CodeGen peephole: fold redundant phys reg copies

[oota-llvm.git] / test / CodeGen / X86 / fp-fast.ll

diff --git a/test/CodeGen/X86/fp-fast.ll b/test/CodeGen/X86/fp-fast.ll
index eb2ebd9119a90c355be3b1cfdcee43bbb9846fde..fa31b9c9e12853de1f4266a161aeb98bec32552d 100644 (file)
--- a/test/CodeGen/X86/fp-fast.ll
+++ b/test/CodeGen/X86/fp-fast.ll
@@ -1,3 +1,4 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc -mtriple=x86_64-unknown-unknown -mattr=avx -enable-unsafe-fp-math < %s | FileCheck %s
 
 define float @test1(float %a) {
@@ -114,45 +115,3 @@ define float @test11(float %a) {
   ret float %t2
 }
 
-; Verify that the first two adds are independent; the destination registers
-; are used as source registers for the third add.
-
-define float @reassociate_adds1(float %a, float %b, float %c, float %d) {
-; CHECK-LABEL: reassociate_adds1:
-; CHECK:       # BB#0:
-; CHECK-NEXT:    vaddss %xmm1, %xmm0, %xmm0
-; CHECK-NEXT:    vaddss %xmm2, %xmm3, %xmm1
-; CHECK-NEXT:    vaddss %xmm1, %xmm0, %xmm0
-; CHECK-NEXT:    retq
-  %add0 = fadd float %a, %b
-  %add1 = fadd float %add0, %c
-  %add2 = fadd float %add1, %d
-  ret float %add2
-}
-
-define float @reassociate_adds2(float %a, float %b, float %c, float %d) {
-; CHECK-LABEL: reassociate_adds2:
-; CHECK:       # BB#0:
-; CHECK-NEXT:    vaddss %xmm1, %xmm0, %xmm0
-; CHECK-NEXT:    vaddss %xmm2, %xmm3, %xmm1
-; CHECK-NEXT:    vaddss %xmm1, %xmm0, %xmm0
-; CHECK-NEXT:    retq
-  %add0 = fadd float %a, %b
-  %add1 = fadd float %c, %add0
-  %add2 = fadd float %add1, %d
-  ret float %add2
-}
-
-define float @reassociate_adds3(float %a, float %b, float %c, float %d) {
-; CHECK-LABEL: reassociate_adds3:
-; CHECK:       # BB#0:
-; CHECK-NEXT:    vaddss %xmm1, %xmm0, %xmm0
-; CHECK-NEXT:    vaddss %xmm2, %xmm3, %xmm1
-; CHECK-NEXT:    vaddss %xmm1, %xmm0, %xmm0
-; CHECK-NEXT:    retq
-  %add0 = fadd float %a, %b
-  %add1 = fadd float %add0, %c
-  %add2 = fadd float %d, %add1
-  ret float %add2
-}
-