CodeGen peephole: fold redundant phys reg copies

[oota-llvm.git] / test / CodeGen / X86 / inline-asm-out-regs.ll

diff --git a/test/CodeGen/X86/inline-asm-out-regs.ll b/test/CodeGen/X86/inline-asm-out-regs.ll
index 3a84bad94d0d370415ae8f7afbef6b12b7bac2ba..8e47f81a5e06982e5c51dbf2995b613be35e62d5 100644 (file)
--- a/test/CodeGen/X86/inline-asm-out-regs.ll
+++ b/test/CodeGen/X86/inline-asm-out-regs.ll
@@ -1,6 +1,4 @@
-; RUN: llvm-as < %s | llc -mtriple=i386-unknown-linux-gnu
-; XFAIL: *
-; Expected to run out of registers during allocation.
+; RUN: llc < %s -mtriple=i386-unknown-linux-gnu
 ; PR3391
 
 @pci_indirect = external global { }             ; <{ }*> [#uses=1]
@@ -11,7 +9,7 @@ entry:
         br label %bb1.i
 
 bb1.i:          ; preds = %bb6.i.i, %bb1.i, %entry
-        %0 = load i32* null, align 8            ; <i32> [#uses=1]
+        %0 = load i32, i32* null, align 8            ; <i32> [#uses=1]
         %1 = icmp ugt i32 %0, 1048575           ; <i1> [#uses=1]
         br i1 %1, label %bb2.i, label %bb1.i
 
@@ -21,7 +19,7 @@ bb2.i:          ; preds = %bb1.i
         ; <i32> [#uses=1]
         %2 = lshr i32 %asmresult2.i.i, 8                ; <i32> [#uses=1]
         %3 = trunc i32 %2 to i8         ; <i8> [#uses=1]
-        %4 = load i32* @pcibios_last_bus, align 4               ; <i32> [#uses=1]
+        %4 = load i32, i32* @pcibios_last_bus, align 4               ; <i32> [#uses=1]
         %5 = icmp slt i32 %4, 0         ; <i1> [#uses=1]
         br i1 %5, label %bb5.i.i, label %bb6.i.i