Enable all Hexagon tests.

[oota-llvm.git] / test / CodeGen / X86 / lsr-nonaffine.ll

diff --git a/test/CodeGen/X86/lsr-nonaffine.ll b/test/CodeGen/X86/lsr-nonaffine.ll
index e5cf9bc515c85124774016aac6379fcce7ff17ed..d825b5a76c09b195374985f53c650dc625145f28 100644 (file)
--- a/test/CodeGen/X86/lsr-nonaffine.ll
+++ b/test/CodeGen/X86/lsr-nonaffine.ll
@@ -1,4 +1,4 @@
-; RUN: llc -asm-verbose=false -march=x86-64 -o - < %s | FileCheck %s
+; RUN: llc -asm-verbose=false -march=x86-64 -mtriple=x86_64-apple-darwin -o - < %s | FileCheck %s
 
 ; LSR should leave non-affine expressions alone because it currently
 ; doesn't know how to do anything with them, and when it tries, it
@@ -7,9 +7,9 @@
 ; CHECK:        xorl %eax, %eax
 ; CHECK-NEXT:   align
 ; CHECK-NEXT: BB0_1:
-; CHECK-NEXT:   movq  %rax, (%{{rdx|r8}})
-; CHECK-NEXT:   addq  %{{rsi|rdx}}, %rax
-; CHECK-NEXT:   cmpq  %{{rdi|rcx}}, %rax
+; CHECK-NEXT:   movq  %rax, (%rdx)
+; CHECK-NEXT:   addq  %rsi, %rax
+; CHECK-NEXT:   cmpq  %rdi, %rax
 ; CHECK-NEXT:   jl
 ; CHECK-NEXT:   imulq %rax, %rax
 ; CHECK-NEXT:   ret
@@ -19,7 +19,7 @@ entry:
 
 loop:
   %i = phi i64 [ 0, %entry ], [ %i.next, %loop ]
-  volatile store i64 %i, i64* %p
+  store volatile i64 %i, i64* %p
   %i.next = add i64 %i, %s
   %c = icmp slt i64 %i.next, %n
   br i1 %c, label %loop, label %exit