CodeGen peephole: fold redundant phys reg copies

[oota-llvm.git] / test / CodeGen / X86 / merge_store.ll

diff --git a/test/CodeGen/X86/merge_store.ll b/test/CodeGen/X86/merge_store.ll
index 940688c6252f7622869a7829bd8040fb1cd807e5..2701f369bcde320f91788d1de785cd23c211dc63 100644 (file)
--- a/test/CodeGen/X86/merge_store.ll
+++ b/test/CodeGen/X86/merge_store.ll
@@ -1,4 +1,5 @@
 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -addr-sink-using-gep=1 | FileCheck %s
 
 define void @merge_store(i32* nocapture %a) {
 ; CHECK-LABEL: merge_store:
@@ -9,16 +10,16 @@ entry:
 
   for.body:
   %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
-  %arrayidx = getelementptr inbounds i32* %a, i64 %indvars.iv
+  %arrayidx = getelementptr inbounds i32, i32* %a, i64 %indvars.iv
   store i32 1, i32* %arrayidx, align 4
   %0 = or i64 %indvars.iv, 1
-  %arrayidx2 = getelementptr inbounds i32* %a, i64 %0
+  %arrayidx2 = getelementptr inbounds i32, i32* %a, i64 %0
   store i32 1, i32* %arrayidx2, align 4
   %1 = or i64 %indvars.iv, 2
-  %arrayidx5 = getelementptr inbounds i32* %a, i64 %1
+  %arrayidx5 = getelementptr inbounds i32, i32* %a, i64 %1
   store i32 1, i32* %arrayidx5, align 4
   %2 = or i64 %indvars.iv, 3
-  %arrayidx8 = getelementptr inbounds i32* %a, i64 %2
+  %arrayidx8 = getelementptr inbounds i32, i32* %a, i64 %2
   store i32 1, i32* %arrayidx8, align 4
   %indvars.iv.next = add nuw nsw i64 %indvars.iv, 4
   %3 = trunc i64 %indvars.iv.next to i32