[x32] Fix FrameIndex check in SelectLEA64_32Addr

[oota-llvm.git] / test / CodeGen / X86 / mmx-shift.ll

diff --git a/test/CodeGen/X86/mmx-shift.ll b/test/CodeGen/X86/mmx-shift.ll
index bafc75444d9192c936a1fddb40e429c10e2b054d..c7c6e75a50717363e2814f22bcc13c50a37950c0 100644 (file)
--- a/test/CodeGen/X86/mmx-shift.ll
+++ b/test/CodeGen/X86/mmx-shift.ll
@@ -1,7 +1,5 @@
-; RUN: llc < %s -march=x86 -mattr=+mmx | grep psllq | grep 32
-; RUN: llc < %s -march=x86-64 -mattr=+mmx | grep psllq | grep 32
-; RUN: llc < %s -march=x86 -mattr=+mmx | grep psrad
-; RUN: llc < %s -march=x86-64 -mattr=+mmx | grep psrlw
+; RUN: llc < %s -march=x86 -mattr=+mmx | FileCheck %s
+; RUN: llc < %s -march=x86-64 -mattr=+mmx | FileCheck %s
 
 define i64 @t1(<1 x i64> %mm1) nounwind  {
 entry:
@@ -9,6 +7,9 @@ entry:
        %tmp6 = tail call x86_mmx @llvm.x86.mmx.pslli.q( x86_mmx %tmp, i32 32 )         ; <x86_mmx> [#uses=1]
         %retval1112 = bitcast x86_mmx %tmp6 to i64
        ret i64 %retval1112
+
+; CHECK-LABEL: t1:
+; CHECK: psllq $32
 }
 
 declare x86_mmx @llvm.x86.mmx.pslli.q(x86_mmx, i32) nounwind readnone 
@@ -18,6 +19,9 @@ entry:
        %tmp7 = tail call x86_mmx @llvm.x86.mmx.psra.d( x86_mmx %mm1, x86_mmx %mm2 ) nounwind readnone          ; <x86_mmx> [#uses=1]
         %retval1112 = bitcast x86_mmx %tmp7 to i64
        ret i64 %retval1112
+
+; CHECK-LABEL: t2:
+; CHECK: psrad
 }
 
 declare x86_mmx @llvm.x86.mmx.psra.d(x86_mmx, x86_mmx) nounwind readnone 
@@ -27,6 +31,9 @@ entry:
        %tmp8 = tail call x86_mmx @llvm.x86.mmx.psrli.w( x86_mmx %mm1, i32 %bits ) nounwind readnone            ; <x86_mmx> [#uses=1]
         %retval1314 = bitcast x86_mmx %tmp8 to i64
        ret i64 %retval1314
+
+; CHECK-LABEL: t3:
+; CHECK: psrlw
 }
 
 declare x86_mmx @llvm.x86.mmx.psrli.w(x86_mmx, i32) nounwind readnone