CodeGen peephole: fold redundant phys reg copies

[oota-llvm.git] / test / CodeGen / X86 / opt-ext-uses.ll

diff --git a/test/CodeGen/X86/opt-ext-uses.ll b/test/CodeGen/X86/opt-ext-uses.ll
index 322850c5523f3381b45d7e1668062341fc90122a..39e6fd0e6a59f3968e670cd1f214725364edba21 100644 (file)
--- a/test/CodeGen/X86/opt-ext-uses.ll
+++ b/test/CodeGen/X86/opt-ext-uses.ll
@@ -1,8 +1,14 @@
-; RUN: llvm-as < %s | llc -march=x86 | grep movw | count 1
+; RUN: llc < %s -march=x86 | FileCheck %s
 
-define i16 @t() signext  {
+; This test should get one and only one register to register mov.
+; CHECK-LABEL: t:
+; CHECK:     movw
+; CHECK-NOT: movw
+; CHECK:     ret
+
+define signext i16 @t()   {
 entry:
-        %tmp180 = load i16* null, align 2               ; <i16> [#uses=3]
+        %tmp180 = load i16, i16* null, align 2               ; <i16> [#uses=3]
         %tmp180181 = sext i16 %tmp180 to i32            ; <i32> [#uses=1]
         %tmp182 = add i16 %tmp180, 10
         %tmp185 = icmp slt i16 %tmp182, 0               ; <i1> [#uses=1]