Implement a feature (-vector-unaligned-mem) to allow targets to

[oota-llvm.git] / test / CodeGen / X86 / pre-split4.ll

diff --git a/test/CodeGen/X86/pre-split4.ll b/test/CodeGen/X86/pre-split4.ll
index 97401b3e7d56642e8bdd0c5672610b5c0181f85f..10cef276c62f6cd9b422ce4a0039c3949a904af0 100644 (file)
--- a/test/CodeGen/X86/pre-split4.ll
+++ b/test/CodeGen/X86/pre-split4.ll
@@ -1,4 +1,4 @@
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -pre-alloc-split -stats |& \
+; RUN: llc < %s -march=x86 -mattr=+sse2 -pre-alloc-split -stats |& \
 ; RUN:   grep {pre-alloc-split} | grep {Number of intervals split} | grep 2
 
 define i32 @main(i32 %argc, i8** %argv) nounwind {
@@ -10,14 +10,14 @@ bb:         ; preds = %bb, %entry
        %Flint.0.reg2mem.0 = phi double [ 0.000000e+00, %entry ], [ %5, %bb ]           ; <double> [#uses=1]
        %twoThrd.0.reg2mem.0 = phi double [ 0.000000e+00, %entry ], [ %1, %bb ]         ; <double> [#uses=1]
        %0 = tail call double @llvm.pow.f64(double 0x3FE5555555555555, double 0.000000e+00)             ; <double> [#uses=1]
-       %1 = add double %0, %twoThrd.0.reg2mem.0                ; <double> [#uses=1]
+       %1 = fadd double %0, %twoThrd.0.reg2mem.0               ; <double> [#uses=1]
        %2 = tail call double @sin(double %k.0.reg2mem.0) nounwind readonly             ; <double> [#uses=1]
-       %3 = mul double 0.000000e+00, %2                ; <double> [#uses=1]
+       %3 = fmul double 0.000000e+00, %2               ; <double> [#uses=1]
        %4 = fdiv double 1.000000e+00, %3               ; <double> [#uses=1]
         store double %Flint.0.reg2mem.0, double* null
         store double %twoThrd.0.reg2mem.0, double* null
-       %5 = add double %4, %Flint.0.reg2mem.0          ; <double> [#uses=1]
-       %6 = add double %k.0.reg2mem.0, 1.000000e+00            ; <double> [#uses=1]
+       %5 = fadd double %4, %Flint.0.reg2mem.0         ; <double> [#uses=1]
+       %6 = fadd double %k.0.reg2mem.0, 1.000000e+00           ; <double> [#uses=1]
        br label %bb
 }