Enable all Hexagon tests.

[oota-llvm.git] / test / CodeGen / X86 / rd-mod-wr-eflags.ll

diff --git a/test/CodeGen/X86/rd-mod-wr-eflags.ll b/test/CodeGen/X86/rd-mod-wr-eflags.ll
index e09a6ca44d8bb8e99c820a259848419130153cc5..faca3d7bacdb1f26e07c2305f293989b326bc6cd 100644 (file)
--- a/test/CodeGen/X86/rd-mod-wr-eflags.ll
+++ b/test/CodeGen/X86/rd-mod-wr-eflags.ll
@@ -75,9 +75,9 @@ define void @example_dec(%struct.obj2* %o) nounwind uwtable ssp {
 ; 64 bit dec
 entry:
   %s64 = getelementptr inbounds %struct.obj2* %o, i64 0, i32 0
-; CHECK-NOT: load (%{{rdi|rcs}})
+; CHECK-NOT: load 
   %0 = load i64* %s64, align 8
-; CHECK: decq (%{{rdi|rcs}})
+; CHECK: decq ({{.*}})
   %dec = add i64 %0, -1
   store i64 %dec, i64* %s64, align 8
   %tobool = icmp eq i64 %dec, 0
@@ -86,9 +86,9 @@ entry:
 ; 32 bit dec
 if.end:
   %s32 = getelementptr inbounds %struct.obj2* %o, i64 0, i32 1
-; CHECK-NOT: load {{[0-9][0-9]*}}(%{{rdi|rcs}})
+; CHECK-NOT: load 
   %1 = load i32* %s32, align 4
-; CHECK: decl {{[0-9][0-9]*}}(%{{rdi|rcs}})
+; CHECK: decl {{[0-9][0-9]*}}({{.*}})
   %dec1 = add i32 %1, -1
   store i32 %dec1, i32* %s32, align 4
   %tobool2 = icmp eq i32 %dec1, 0
@@ -97,9 +97,9 @@ if.end:
 ; 16 bit dec
 if.end1:
   %s16 = getelementptr inbounds %struct.obj2* %o, i64 0, i32 2
-; CHECK-NOT: load {{[0-9][0-9]*}}(%{{rdi|rcs}})
+; CHECK-NOT: load 
   %2 = load i16* %s16, align 2
-; CHECK: decw {{[0-9][0-9]*}}(%{{rdi|rcs}})
+; CHECK: decw {{[0-9][0-9]*}}({{.*}})
   %dec2 = add i16 %2, -1
   store i16 %dec2, i16* %s16, align 2
   %tobool3 = icmp eq i16 %dec2, 0
@@ -108,9 +108,9 @@ if.end1:
 ; 8 bit dec
 if.end2:
   %s8 = getelementptr inbounds %struct.obj2* %o, i64 0, i32 3
-; CHECK-NOT: load {{[0-9][0-9]*}}(%{{rdi|rcs}})
+; CHECK-NOT: load 
   %3 = load i8* %s8
-; CHECK: decb {{[0-9][0-9]*}}(%{{rdi|rcs}})
+; CHECK: decb {{[0-9][0-9]*}}({{.*}})
   %dec3 = add i8 %3, -1
   store i8 %dec3, i8* %s8
   %tobool4 = icmp eq i8 %dec3, 0
@@ -129,9 +129,9 @@ define void @example_inc(%struct.obj2* %o) nounwind uwtable ssp {
 ; 64 bit inc
 entry:
   %s64 = getelementptr inbounds %struct.obj2* %o, i64 0, i32 0
-; CHECK-NOT: load (%{{rdi|rcs}})
+; CHECK-NOT: load 
   %0 = load i64* %s64, align 8
-; CHECK: incq (%{{rdi|rcs}})
+; CHECK: incq ({{.*}})
   %inc = add i64 %0, 1
   store i64 %inc, i64* %s64, align 8
   %tobool = icmp eq i64 %inc, 0
@@ -140,9 +140,9 @@ entry:
 ; 32 bit inc
 if.end:
   %s32 = getelementptr inbounds %struct.obj2* %o, i64 0, i32 1
-; CHECK-NOT: load {{[0-9][0-9]*}}(%{{rdi|rcs}})
+; CHECK-NOT: load 
   %1 = load i32* %s32, align 4
-; CHECK: incl {{[0-9][0-9]*}}(%{{rdi|rcs}})
+; CHECK: incl {{[0-9][0-9]*}}({{.*}})
   %inc1 = add i32 %1, 1
   store i32 %inc1, i32* %s32, align 4
   %tobool2 = icmp eq i32 %inc1, 0
@@ -151,9 +151,9 @@ if.end:
 ; 16 bit inc
 if.end1:
   %s16 = getelementptr inbounds %struct.obj2* %o, i64 0, i32 2
-; CHECK-NOT: load {{[0-9][0-9]*}}(%{{rdi|rcs}})
+; CHECK-NOT: load 
   %2 = load i16* %s16, align 2
-; CHECK: incw {{[0-9][0-9]*}}(%{{rdi|rcs}})
+; CHECK: incw {{[0-9][0-9]*}}({{.*}})
   %inc2 = add i16 %2, 1
   store i16 %inc2, i16* %s16, align 2
   %tobool3 = icmp eq i16 %inc2, 0
@@ -162,9 +162,9 @@ if.end1:
 ; 8 bit inc
 if.end2:
   %s8 = getelementptr inbounds %struct.obj2* %o, i64 0, i32 3
-; CHECK-NOT: load {{[0-9][0-9]*}}(%{{rdi|rcs}})
+; CHECK-NOT: load 
   %3 = load i8* %s8
-; CHECK: incb {{[0-9][0-9]*}}(%{{rdi|rcs}})
+; CHECK: incb {{[0-9][0-9]*}}({{.*}})
   %inc3 = add i8 %3, 1
   store i8 %inc3, i8* %s8
   %tobool4 = icmp eq i8 %inc3, 0