CodeGen peephole: fold redundant phys reg copies

[oota-llvm.git] / test / CodeGen / X86 / rdrand.ll

diff --git a/test/CodeGen/X86/rdrand.ll b/test/CodeGen/X86/rdrand.ll
index 05fca0ecf7051ff90c492369e888882ec25ab998..107cde05a0e6f8f98a487b88555c4014501c7334 100644 (file)
--- a/test/CodeGen/X86/rdrand.ll
+++ b/test/CodeGen/X86/rdrand.ll
@@ -11,10 +11,10 @@ define i32 @_rdrand16_step(i16* %random_val) {
   ret i32 %isvalid
 ; CHECK-LABEL: _rdrand16_step:
 ; CHECK: rdrandw       %ax
-; CHECK: movw  %ax, (%r[[A0:di|cx]])
 ; CHECK: movzwl        %ax, %ecx
 ; CHECK: movl  $1, %eax
 ; CHECK: cmovael       %ecx, %eax
+; CHECK: movw  %cx, (%r[[A0:di|cx]])
 ; CHECK: ret
 }
 
@@ -26,9 +26,9 @@ define i32 @_rdrand32_step(i32* %random_val) {
   ret i32 %isvalid
 ; CHECK-LABEL: _rdrand32_step:
 ; CHECK: rdrandl       %e[[T0:[a-z]+]]
-; CHECK: movl  %e[[T0]], (%r[[A0]])
 ; CHECK: movl  $1, %eax
 ; CHECK: cmovael       %e[[T0]], %eax
+; CHECK: movl  %e[[T0]], (%r[[A0]])
 ; CHECK: ret
 }
 
@@ -40,9 +40,9 @@ define i32 @_rdrand64_step(i64* %random_val) {
   ret i32 %isvalid
 ; CHECK-LABEL: _rdrand64_step:
 ; CHECK: rdrandq       %r[[T1:[a-z]+]]
-; CHECK: movq  %r[[T1]], (%r[[A0]])
 ; CHECK: movl  $1, %eax
 ; CHECK: cmovael       %e[[T1]], %eax
+; CHECK: movq  %r[[T1]], (%r[[A0]])
 ; CHECK: ret
 }
 
@@ -69,7 +69,7 @@ while.body:                                       ; preds = %entry, %while.body
   %p.addr.03 = phi i32* [ %incdec.ptr, %while.body ], [ %p, %entry ]
   %n.addr.02 = phi i32 [ %dec, %while.body ], [ %n, %entry ]
   %dec = add nsw i32 %n.addr.02, -1
-  %incdec.ptr = getelementptr inbounds i32* %p.addr.03, i64 1
+  %incdec.ptr = getelementptr inbounds i32, i32* %p.addr.03, i64 1
   %rand = tail call { i32, i32 } @llvm.x86.rdrand.32() nounwind
   %v1 = extractvalue { i32, i32 } %rand, 0
   store i32 %v1, i32* %p.addr.03, align 4