CodeGen peephole: fold redundant phys reg copies

[oota-llvm.git] / test / CodeGen / X86 / rdrand.ll

diff --git a/test/CodeGen/X86/rdrand.ll b/test/CodeGen/X86/rdrand.ll
index 0fd9916bfa14d44e6c516529999ee1053373891e..107cde05a0e6f8f98a487b88555c4014501c7334 100644 (file)
--- a/test/CodeGen/X86/rdrand.ll
+++ b/test/CodeGen/X86/rdrand.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=core-avx-i -mattr=+rdrand | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=core-avx-i -mattr=+rdrnd | FileCheck %s
 declare {i16, i32} @llvm.x86.rdrand.16()
 declare {i32, i32} @llvm.x86.rdrand.32()
 declare {i64, i32} @llvm.x86.rdrand.64()
@@ -9,12 +9,12 @@ define i32 @_rdrand16_step(i16* %random_val) {
   store i16 %randval, i16* %random_val
   %isvalid = extractvalue {i16, i32} %call, 1
   ret i32 %isvalid
-; CHECK: _rdrand16_step:
+; CHECK-LABEL: _rdrand16_step:
 ; CHECK: rdrandw       %ax
-; CHECK: movw  %ax, (%r[[A0:di|cx]])
 ; CHECK: movzwl        %ax, %ecx
 ; CHECK: movl  $1, %eax
 ; CHECK: cmovael       %ecx, %eax
+; CHECK: movw  %cx, (%r[[A0:di|cx]])
 ; CHECK: ret
 }
 
@@ -24,11 +24,11 @@ define i32 @_rdrand32_step(i32* %random_val) {
   store i32 %randval, i32* %random_val
   %isvalid = extractvalue {i32, i32} %call, 1
   ret i32 %isvalid
-; CHECK: _rdrand32_step:
+; CHECK-LABEL: _rdrand32_step:
 ; CHECK: rdrandl       %e[[T0:[a-z]+]]
-; CHECK: movl  %e[[T0]], (%r[[A0]])
 ; CHECK: movl  $1, %eax
 ; CHECK: cmovael       %e[[T0]], %eax
+; CHECK: movl  %e[[T0]], (%r[[A0]])
 ; CHECK: ret
 }
 
@@ -38,11 +38,11 @@ define i32 @_rdrand64_step(i64* %random_val) {
   store i64 %randval, i64* %random_val
   %isvalid = extractvalue {i64, i32} %call, 1
   ret i32 %isvalid
-; CHECK: _rdrand64_step:
+; CHECK-LABEL: _rdrand64_step:
 ; CHECK: rdrandq       %r[[T1:[a-z]+]]
-; CHECK: movq  %r[[T1]], (%r[[A0]])
 ; CHECK: movl  $1, %eax
 ; CHECK: cmovael       %e[[T1]], %eax
+; CHECK: movq  %r[[T1]], (%r[[A0]])
 ; CHECK: ret
 }
 
@@ -54,7 +54,7 @@ define i32 @CSE() nounwind {
  %v2 = extractvalue { i32, i32 } %rand2, 0
  %add = add i32 %v2, %v1
  ret i32 %add
-; CHECK: CSE:
+; CHECK-LABEL: CSE:
 ; CHECK: rdrandl
 ; CHECK: rdrandl
 }
@@ -69,7 +69,7 @@ while.body:                                       ; preds = %entry, %while.body
   %p.addr.03 = phi i32* [ %incdec.ptr, %while.body ], [ %p, %entry ]
   %n.addr.02 = phi i32 [ %dec, %while.body ], [ %n, %entry ]
   %dec = add nsw i32 %n.addr.02, -1
-  %incdec.ptr = getelementptr inbounds i32* %p.addr.03, i64 1
+  %incdec.ptr = getelementptr inbounds i32, i32* %p.addr.03, i64 1
   %rand = tail call { i32, i32 } @llvm.x86.rdrand.32() nounwind
   %v1 = extractvalue { i32, i32 } %rand, 0
   store i32 %v1, i32* %p.addr.03, align 4
@@ -78,7 +78,7 @@ while.body:                                       ; preds = %entry, %while.body
 
 while.end:                                        ; preds = %while.body, %entry
   ret void
-; CHECK: loop:
+; CHECK-LABEL: loop:
 ; CHECK-NOT: rdrandl
 ; CHECK: This Inner Loop Header: Depth=1
 ; CHECK: rdrandl