CodeGen peephole: fold redundant phys reg copies

[oota-llvm.git] / test / CodeGen / X86 / rem.ll

diff --git a/test/CodeGen/X86/rem.ll b/test/CodeGen/X86/rem.ll
index 905b1423939bbabe3acd41e5fa6c99fc043537eb..733b7942a6d52ede2577f7025a5f7923d19b7145 100644 (file)
--- a/test/CodeGen/X86/rem.ll
+++ b/test/CodeGen/X86/rem.ll
@@ -1,23 +1,37 @@
-; RUN: llvm-as < %s | llc -march=x86 &&
-; RUN: llvm-as < %s | llc -march=x86 | not grep div
+; RUN: llc < %s -march=x86 | FileCheck %s
 
-int %test1(int %X) {
-        %tmp1 = rem int %X, 255
-        ret int %tmp1
+; CHECK-LABEL: test1:
+; CHECK-NOT: div
+define i32 @test1(i32 %X) {
+        %tmp1 = srem i32 %X, 255                ; <i32> [#uses=1]
+        ret i32 %tmp1
 }
 
-int %test2(int %X) {
-        %tmp1 = rem int %X, 256 
-        ret int %tmp1
+; CHECK-LABEL: test2:
+; CHECK-NOT: div
+define i32 @test2(i32 %X) {
+        %tmp1 = srem i32 %X, 256                ; <i32> [#uses=1]
+        ret i32 %tmp1
 }
 
-uint %test3(uint %X) {
-        %tmp1 = rem uint %X, 255
-        ret uint %tmp1
+; CHECK-LABEL: test3:
+; CHECK-NOT: div
+define i32 @test3(i32 %X) {
+        %tmp1 = urem i32 %X, 255                ; <i32> [#uses=1]
+        ret i32 %tmp1
 }
 
-uint %test4(uint %X) {
-        %tmp1 = rem uint %X, 256  ; just an and
-        ret uint %tmp1
+; CHECK-LABEL: test4:
+; CHECK-NOT: div
+define i32 @test4(i32 %X) {
+        %tmp1 = urem i32 %X, 256                ; <i32> [#uses=1]
+        ret i32 %tmp1
 }
 
+; CHECK-LABEL: test5:
+; CHECK-NOT: cltd
+define i32 @test5(i32 %X) nounwind readnone {
+entry:
+       %0 = srem i32 41, %X
+       ret i32 %0
+}