AVX-512: Added intrinsics for vcvt, vcvtt, vrndscale, vcmp

[oota-llvm.git] / test / CodeGen / X86 / rot16.ll

diff --git a/test/CodeGen/X86/rot16.ll b/test/CodeGen/X86/rot16.ll
index 42ece47b0300456af4b058e4079d67b0a668cf6a..6d7c702afc406f4ec8e9234668fcd3a2844cb81d 100644 (file)
--- a/test/CodeGen/X86/rot16.ll
+++ b/test/CodeGen/X86/rot16.ll
@@ -1,11 +1,9 @@
-; RUN: llc < %s -march=x86 > %t
-; RUN: grep rol %t | count 3
-; RUN: grep ror %t | count 1
-; RUN: grep shld %t | count 2
-; RUN: grep shrd %t | count 2
+; RUN: llc < %s -march=x86 -mcpu=generic | FileCheck %s
 
 define i16 @foo(i16 %x, i16 %y, i16 %z) nounwind readnone {
 entry:
+; CHECK-LABEL: foo:
+; CHECK: rolw %cl
        %0 = shl i16 %x, %z
        %1 = sub i16 16, %z
        %2 = lshr i16 %x, %1
@@ -15,6 +13,8 @@ entry:
 
 define i16 @bar(i16 %x, i16 %y, i16 %z) nounwind readnone {
 entry:
+; CHECK-LABEL: bar:
+; CHECK: shldw %cl
        %0 = shl i16 %y, %z
        %1 = sub i16 16, %z
        %2 = lshr i16 %x, %1
@@ -24,6 +24,8 @@ entry:
 
 define i16 @un(i16 %x, i16 %y, i16 %z) nounwind readnone {
 entry:
+; CHECK-LABEL: un:
+; CHECK: rorw %cl
        %0 = lshr i16 %x, %z
        %1 = sub i16 16, %z
        %2 = shl i16 %x, %1
@@ -33,6 +35,8 @@ entry:
 
 define i16 @bu(i16 %x, i16 %y, i16 %z) nounwind readnone {
 entry:
+; CHECK-LABEL: bu:
+; CHECK: shrdw
        %0 = lshr i16 %y, %z
        %1 = sub i16 16, %z
        %2 = shl i16 %x, %1
@@ -42,6 +46,8 @@ entry:
 
 define i16 @xfoo(i16 %x, i16 %y, i16 %z) nounwind readnone {
 entry:
+; CHECK-LABEL: xfoo:
+; CHECK: rolw $5
        %0 = lshr i16 %x, 11
        %1 = shl i16 %x, 5
        %2 = or i16 %0, %1
@@ -50,6 +56,8 @@ entry:
 
 define i16 @xbar(i16 %x, i16 %y, i16 %z) nounwind readnone {
 entry:
+; CHECK-LABEL: xbar:
+; CHECK: shldw $5
        %0 = shl i16 %y, 5
        %1 = lshr i16 %x, 11
        %2 = or i16 %0, %1
@@ -58,6 +66,8 @@ entry:
 
 define i16 @xun(i16 %x, i16 %y, i16 %z) nounwind readnone {
 entry:
+; CHECK-LABEL: xun:
+; CHECK: rolw $11
        %0 = lshr i16 %x, 5
        %1 = shl i16 %x, 11
        %2 = or i16 %0, %1
@@ -66,6 +76,8 @@ entry:
 
 define i16 @xbu(i16 %x, i16 %y, i16 %z) nounwind readnone {
 entry:
+; CHECK-LABEL: xbu:
+; CHECK: shldw $11
        %0 = lshr i16 %y, 5
        %1 = shl i16 %x, 11
        %2 = or i16 %0, %1