Let the inline asm 'q' constraint match float, and on 64-bit double too.

[oota-llvm.git] / test / CodeGen / X86 / scalar-extract.ll

diff --git a/test/CodeGen/X86/scalar-extract.ll b/test/CodeGen/X86/scalar-extract.ll
index 172c424a782f146db0b663e4684aa0078816790c..2845838409333339bd5ef9148bf4f52aa5d79145 100644 (file)
--- a/test/CodeGen/X86/scalar-extract.ll
+++ b/test/CodeGen/X86/scalar-extract.ll
@@ -1,4 +1,4 @@
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+mmx -o %t -f
+; RUN: llc < %s -march=x86 -mattr=+mmx -o %t
 ; RUN: not grep movq  %t
 
 ; Check that widening doesn't introduce a mmx register in this case when