CodeGen peephole: fold redundant phys reg copies

[oota-llvm.git] / test / CodeGen / X86 / sdiv-exact.ll

diff --git a/test/CodeGen/X86/sdiv-exact.ll b/test/CodeGen/X86/sdiv-exact.ll
index 48bb8836e89671ef0018556d33e54cb8d0aa132e..a6ace5bc31c1ab75da41c20c63ce2a9bba732493 100644 (file)
--- a/test/CodeGen/X86/sdiv-exact.ll
+++ b/test/CodeGen/X86/sdiv-exact.ll
@@ -1,9 +1,9 @@
-; RUN: llc -march=x86 < %s | FileCheck %s
+; RUN: llc -march=x86 -mattr=+sse2 < %s | FileCheck %s
 
 define i32 @test1(i32 %x) {
   %div = sdiv exact i32 %x, 25
   ret i32 %div
-; CHECK: test1:
+; CHECK-LABEL: test1:
 ; CHECK: imull $-1030792151, 4(%esp)
 ; CHECK-NEXT: ret
 }
@@ -11,8 +11,19 @@ define i32 @test1(i32 %x) {
 define i32 @test2(i32 %x) {
   %div = sdiv exact i32 %x, 24
   ret i32 %div
-; CHECK: test2:
+; CHECK-LABEL: test2:
 ; CHECK: sarl  $3
 ; CHECK-NEXT: imull    $-1431655765
 ; CHECK-NEXT: ret
 }
+
+define <4 x i32> @test3(<4 x i32> %x) {
+  %div = sdiv exact <4 x i32> %x, <i32 24, i32 24, i32 24, i32 24>
+  ret <4 x i32> %div
+; CHECK-LABEL: test3:
+; CHECK: psrad $3,
+; CHECK: pmuludq
+; CHECK: pmuludq
+; CHECK-NOT: psrad
+; CHECK: ret
+}