CodeGen peephole: fold redundant phys reg copies

[oota-llvm.git] / test / CodeGen / X86 / sext-load.ll

diff --git a/test/CodeGen/X86/sext-load.ll b/test/CodeGen/X86/sext-load.ll
index 58c93229a2c0a66ed2857f1edbb65132121078cb..2ea6e012192e03089c56923e2e2dd5fca71c7645 100644 (file)
--- a/test/CodeGen/X86/sext-load.ll
+++ b/test/CodeGen/X86/sext-load.ll
@@ -3,7 +3,7 @@
 ; When doing sign extension, use the sext-load lowering to take advantage of
 ; x86's sign extension during loads.
 ;
-; CHECK: test1:
+; CHECK-LABEL: test1:
 ; CHECK:      movsbl {{.*}}, %eax
 ; CHECK-NEXT: ret
 define i32 @test1(i32 %X) nounwind  {
@@ -16,14 +16,14 @@ entry:
 ; When using a sextload representation, ensure that the sign extension is
 ; preserved even when removing shifted-out low bits.
 ;
-; CHECK: test2:
+; CHECK-LABEL: test2:
 ; CHECK:      movswl {{.*}}, %eax
 ; CHECK-NEXT: ret
 define i32 @test2({i16, [6 x i8]}* %this) {
 entry:
-  %b48 = getelementptr inbounds { i16, [6 x i8] }* %this, i32 0, i32 1
+  %b48 = getelementptr inbounds { i16, [6 x i8] }, { i16, [6 x i8] }* %this, i32 0, i32 1
   %cast = bitcast [6 x i8]* %b48 to i48*
-  %bf.load = load i48* %cast, align 2
+  %bf.load = load i48, i48* %cast, align 2
   %bf.ashr = ashr i48 %bf.load, 32
   %bf.cast = trunc i48 %bf.ashr to i32
   ret i32 %bf.cast