Let the inline asm 'q' constraint match float, and on 64-bit double too.

[oota-llvm.git] / test / CodeGen / X86 / shl_elim.ll

diff --git a/test/CodeGen/X86/shl_elim.ll b/test/CodeGen/X86/shl_elim.ll
index 445889166bd5c30278dc1d04469377ffc7d04e0e..0827221875b1dd6f8fc4243bb912006b80fe4bd3 100644 (file)
--- a/test/CodeGen/X86/shl_elim.ll
+++ b/test/CodeGen/X86/shl_elim.ll
@@ -2,7 +2,7 @@
 ; RUN: llc < %s -march=x86 | grep {shrl        .eax}
 ; RUN: llc < %s -march=x86 | grep {movswl      .ax, .eax}
 
-define i32 @test1(i64 %a) {
+define i32 @test1(i64 %a) nounwind {
         %tmp29 = lshr i64 %a, 24                ; <i64> [#uses=1]
         %tmp23 = trunc i64 %tmp29 to i32                ; <i32> [#uses=1]
         %tmp410 = lshr i32 %tmp23, 9            ; <i32> [#uses=1]