Enable all Hexagon tests.

[oota-llvm.git] / test / CodeGen / X86 / sibcall.ll

diff --git a/test/CodeGen/X86/sibcall.ll b/test/CodeGen/X86/sibcall.ll
index 549a3cfb11467493b3033ee2ca3b1e9877ac39f4..2af355905dc3f5f847f6db15b9a4c8046e4d99d3 100644 (file)
--- a/test/CodeGen/X86/sibcall.ll
+++ b/test/CodeGen/X86/sibcall.ll
@@ -147,7 +147,7 @@ define i32 @t11(i32 %x, i32 %y, i32 %z.0, i32 %z.1, i32 %z.2) nounwind ssp {
 
 ; 32: t11:
 ; 32-NOT: subl ${{[0-9]+}}, %esp
-; 32: jne
+; 32: je
 ; 32-NOT: movl
 ; 32-NOT: addl ${{[0-9]+}}, %esp
 ; 32: jmp {{_?}}foo5
@@ -198,7 +198,7 @@ declare i32 @foo6(i32, i32, %struct.t* byval align 4)
 
 ; rdar://r7717598
 %struct.ns = type { i32, i32 }
-%struct.cp = type { float, float }
+%struct.cp = type { float, float, float, float, float }
 
 define %struct.ns* @t13(%struct.cp* %yy) nounwind ssp {
 ; 32: t13:
@@ -312,8 +312,6 @@ entry:
   ret void
 }
 
-declare void @foo()
-
 ; If caller / callee calling convention mismatch then check if the return
 ; values are returned in the same registers.
 ; rdar://7874780