Enable all Hexagon tests.

[oota-llvm.git] / test / CodeGen / X86 / sse-align-12.ll

diff --git a/test/CodeGen/X86/sse-align-12.ll b/test/CodeGen/X86/sse-align-12.ll
index a5016601db9f89ef93f4eec22bf97cec5de3e67b..71a42f4db34ab5104eff3fa1ed655c84ed92f82a 100644 (file)
--- a/test/CodeGen/X86/sse-align-12.ll
+++ b/test/CodeGen/X86/sse-align-12.ll
@@ -1,9 +1,8 @@
-; RUN: llvm-as < %s | llc -march=x86-64 | grep unpck | count 2
-; RUN: llvm-as < %s | llc -march=x86-64 | grep shuf | count 2
-; RUN: llvm-as < %s | llc -march=x86-64 | grep ps | count 4
-; RUN: llvm-as < %s | llc -march=x86-64 | grep pd | count 4
-; RUN: llvm-as < %s | llc -march=x86-64 | grep movup | count 4
+; RUN: llc < %s -march=x86-64 -mcpu=nehalem | FileCheck %s
 
+; CHECK: a:
+; CHECK: movdqu
+; CHECK: pshufd
 define <4 x float> @a(<4 x float>* %y) nounwind {
   %x = load <4 x float>* %y, align 4
   %a = extractelement <4 x float> %x, i32 0
@@ -16,6 +15,10 @@ define <4 x float> @a(<4 x float>* %y) nounwind {
   %s = insertelement <4 x float> %r, float %a, i32 3
   ret <4 x float> %s
 }
+
+; CHECK: b:
+; CHECK: movups
+; CHECK: unpckhps
 define <4 x float> @b(<4 x float>* %y, <4 x float> %z) nounwind {
   %x = load <4 x float>* %y, align 4
   %a = extractelement <4 x float> %x, i32 2
@@ -28,6 +31,10 @@ define <4 x float> @b(<4 x float>* %y, <4 x float> %z) nounwind {
   %s = insertelement <4 x float> %r, float %b, i32 3
   ret <4 x float> %s
 }
+
+; CHECK: c:
+; CHECK: movupd
+; CHECK: shufpd
 define <2 x double> @c(<2 x double>* %y) nounwind {
   %x = load <2 x double>* %y, align 8
   %a = extractelement <2 x double> %x, i32 0
@@ -36,6 +43,10 @@ define <2 x double> @c(<2 x double>* %y) nounwind {
   %r = insertelement <2 x double> %p, double %a, i32 1
   ret <2 x double> %r
 }
+
+; CHECK: d:
+; CHECK: movupd
+; CHECK: unpckhpd
 define <2 x double> @d(<2 x double>* %y, <2 x double> %z) nounwind {
   %x = load <2 x double>* %y, align 8
   %a = extractelement <2 x double> %x, i32 1