Implement a feature (-vector-unaligned-mem) to allow targets to

[oota-llvm.git] / test / CodeGen / X86 / sse2.ll

diff --git a/test/CodeGen/X86/sse2.ll b/test/CodeGen/X86/sse2.ll
index 463df30a6f0454a296363d970b00b153e7f792fa..f2b8010d4138b89c0ab4ab07da6751f473751768 100644 (file)
--- a/test/CodeGen/X86/sse2.ll
+++ b/test/CodeGen/X86/sse2.ll
@@ -1,5 +1,5 @@
 ; Tests for SSE2 and below, without SSE3+.
-; RUN: llvm-as < %s | llc -march=x86 -mcpu=pentium4 | FileCheck %s
+; RUN: llc < %s -mtriple=i386-apple-darwin10 -mcpu=pentium4 -O3 | FileCheck %s
 
 define void @t1(<2 x double>* %r, <2 x double>* %A, double %B) nounwind  {
        %tmp3 = load <2 x double>* %A, align 16
@@ -10,11 +10,11 @@ define void @t1(<2 x double>* %r, <2 x double>* %A, double %B) nounwind  {
         
 ; CHECK: t1:
 ; CHECK:       movl    8(%esp), %eax
-; CHECK:       movapd  (%eax), %xmm0
-; CHECK:       movlpd  12(%esp), %xmm0
-; CHECK:       movl    4(%esp), %eax
-; CHECK:       movapd  %xmm0, (%eax)
-; CHECK:       ret
+; CHECK-NEXT:  movl    4(%esp), %ecx
+; CHECK-NEXT:  movapd  (%eax), %xmm0
+; CHECK-NEXT:  movlpd  12(%esp), %xmm0
+; CHECK-NEXT:  movapd  %xmm0, (%ecx)
+; CHECK-NEXT:  ret
 }
 
 define void @t2(<2 x double>* %r, <2 x double>* %A, double %B) nounwind  {
@@ -26,9 +26,9 @@ define void @t2(<2 x double>* %r, <2 x double>* %A, double %B) nounwind  {
         
 ; CHECK: t2:
 ; CHECK:       movl    8(%esp), %eax
-; CHECK:       movapd  (%eax), %xmm0
-; CHECK:       movhpd  12(%esp), %xmm0
-; CHECK:       movl    4(%esp), %eax
-; CHECK:       movapd  %xmm0, (%eax)
-; CHECK:       ret
+; CHECK-NEXT:  movl    4(%esp), %ecx
+; CHECK-NEXT:  movapd  (%eax), %xmm0
+; CHECK-NEXT:  movhpd  12(%esp), %xmm0
+; CHECK-NEXT:  movapd  %xmm0, (%ecx)
+; CHECK-NEXT:  ret
 }