Enable all Hexagon tests.

[oota-llvm.git] / test / CodeGen / X86 / sse3.ll

diff --git a/test/CodeGen/X86/sse3.ll b/test/CodeGen/X86/sse3.ll
index 291069d4625b16fb8571bb93b3f8561c2acd18e4..5ea1b4dff1c1587cb0b1bd00c23c271b9ddb5eec 100644 (file)
--- a/test/CodeGen/X86/sse3.ll
+++ b/test/CodeGen/X86/sse3.ll
@@ -164,12 +164,12 @@ define internal void @t10() nounwind {
         store <4 x i16> %6, <4 x i16>* @g2, align 8
         ret void
 ; X64:         t10:
-; X64:                 pextrw  $4, [[X0:%xmm[0-9]+]], %eax
-; X64:                 movlhps [[X1:%xmm[0-9]+]]
-; X64:                 pshuflw $8, [[X1]], [[X2:%xmm[0-9]+]]
-; X64:                 pinsrw  $2, %eax, [[X2]]
+; X64:                 pextrw  $4, [[X0:%xmm[0-9]+]], %ecx
 ; X64:                 pextrw  $6, [[X0]], %eax
-; X64:                 pinsrw  $3, %eax, [[X2]]
+; X64:                 movlhps [[X0]], [[X0]]
+; X64:                 pshuflw $8, [[X0]], [[X0]]
+; X64:                 pinsrw  $2, %ecx, [[X0]]
+; X64:                 pinsrw  $3, %eax, [[X0]]
 }
 
 
@@ -232,10 +232,9 @@ entry:
         %tmp8 = shufflevector <8 x i16> %T0, <8 x i16> %T1, <8 x i32> < i32 undef, i32 undef, i32 7, i32 2, i32 8, i32 undef, i32 undef , i32 undef >
         ret <8 x i16> %tmp8
 ; X64:         t15:
-; X64:          movdqa %xmm0, %xmm2
+; X64:                 pextrw  $7, %xmm0, %eax
 ; X64:                 punpcklqdq      %xmm1, %xmm0
 ; X64:                 pshuflw $-128, %xmm0, %xmm0
-; X64:                 pextrw  $7, %xmm2, %eax
 ; X64:                 pinsrw  $2, %eax, %xmm0
 ; X64:                 ret
 }
@@ -248,12 +247,11 @@ entry:
         %tmp9 = shufflevector <16 x i8> %tmp8, <16 x i8> %T0,  <16 x i32> < i32 0, i32 1, i32 2, i32 17,  i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef , i32 undef >
         ret <16 x i8> %tmp9
 ; X64:         t16:
-; X64:                 movdqa  %xmm1, %xmm2
-; X64:                 pslldq  $2, %xmm2
-; X64:                 movd    %xmm2, %eax
-; X64:                 pinsrw  $0, %eax, %xmm0
-; X64:                 pextrw  $8, %xmm1, %eax
-; X64:                 pextrw  $1, %xmm2, %ecx
+; X64:                 pextrw  $8, %xmm0, %eax
+; X64:                 pslldq  $2, %xmm0
+; X64:                 movd    %xmm0, %ecx
+; X64:                 pextrw  $1, %xmm0, %edx
+; X64:                 pinsrw  $0, %ecx, %xmm0
 ; X64:                 ret
 }