Enable all Hexagon tests.

[oota-llvm.git] / test / CodeGen / X86 / sse41-blend.ll

diff --git a/test/CodeGen/X86/sse41-blend.ll b/test/CodeGen/X86/sse41-blend.ll
index 0a71dd0d04d44804ea45c5222ba80a9a44496ed3..1a1017d2c1762b24a224fe1e6b5fa27f66c171c6 100644 (file)
--- a/test/CodeGen/X86/sse41-blend.ll
+++ b/test/CodeGen/X86/sse41-blend.ll
@@ -36,7 +36,6 @@ define <4 x i32> @vsel_i32(<4 x i32> %v1, <4 x i32> %v2) {
 
 
 ;CHECK: vsel_double
-;CHECK-NOT: sra
 ;CHECK: blendvpd
 ;CHECK: ret
 define <4 x double> @vsel_double(<4 x double> %v1, <4 x double> %v2) {
@@ -55,7 +54,6 @@ define <4 x i64> @vsel_i64(<4 x i64> %v1, <4 x i64> %v2) {
 
 
 ;CHECK: vsel_i8
-;CHECK-NOT: sra
 ;CHECK: pblendvb
 ;CHECK: ret
 define <16 x i8> @vsel_i8(<16 x i8> %v1, <16 x i8> %v2) {
@@ -67,7 +65,6 @@ define <16 x i8> @vsel_i8(<16 x i8> %v1, <16 x i8> %v2) {
 ; CHECK: A
 define <2 x double> @A(<2 x double> %x, <2 x double> %y) {
   ; CHECK: cmplepd
-  ; CHECK-NOT: sra
   ; CHECK: blendvpd
   %max_is_x = fcmp oge <2 x double> %x, %y
   %max = select <2 x i1> %max_is_x, <2 x double> %x, <2 x double> %y
@@ -77,10 +74,17 @@ define <2 x double> @A(<2 x double> %x, <2 x double> %y) {
 ; CHECK: B
 define <2 x double> @B(<2 x double> %x, <2 x double> %y) {
   ; CHECK: cmpnlepd
-  ; CHECK-NOT: sra
   ; CHECK: blendvpd
   %min_is_x = fcmp ult <2 x double> %x, %y
   %min = select <2 x i1> %min_is_x, <2 x double> %x, <2 x double> %y
   ret <2 x double> %min
 }
 
+; CHECK: float_crash
+define void @float_crash() nounwind {
+entry:
+  %merge205vector_func.i = select <4 x i1> undef, <4 x double> undef, <4 x double> undef
+  %extract214vector_func.i = extractelement <4 x double> %merge205vector_func.i, i32 0
+  store double %extract214vector_func.i, double addrspace(1)* undef, align 8
+  ret void
+}