Enable all Hexagon tests.

[oota-llvm.git] / test / CodeGen / X86 / sse41-blend.ll

diff --git a/test/CodeGen/X86/sse41-blend.ll b/test/CodeGen/X86/sse41-blend.ll
index aba2c129e3af4e9db1a09842f143d8d1b5f7ac65..1a1017d2c1762b24a224fe1e6b5fa27f66c171c6 100644 (file)
--- a/test/CodeGen/X86/sse41-blend.ll
+++ b/test/CodeGen/X86/sse41-blend.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -promote-elements -mattr=+sse41 | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=corei7 -promote-elements -mattr=+sse41 | FileCheck %s
 
 ;CHECK: vsel_float
 ;CHECK: blendvps
@@ -9,6 +9,23 @@ define <4 x float> @vsel_float(<4 x float> %v1, <4 x float> %v2) {
 }
 
 
+;CHECK: vsel_4xi8
+;CHECK: blendvps
+;CHECK: ret
+define <4 x i8> @vsel_4xi8(<4 x i8> %v1, <4 x i8> %v2) {
+  %vsel = select <4 x i1> <i1 true, i1 false, i1 false, i1 false>, <4 x i8> %v1, <4 x i8> %v2
+  ret <4 x i8> %vsel
+}
+
+;CHECK: vsel_4xi16
+;CHECK: blendvps
+;CHECK: ret
+define <4 x i16> @vsel_4xi16(<4 x i16> %v1, <4 x i16> %v2) {
+  %vsel = select <4 x i1> <i1 true, i1 false, i1 false, i1 false>, <4 x i16> %v1, <4 x i16> %v2
+  ret <4 x i16> %vsel
+}
+
+
 ;CHECK: vsel_i32
 ;CHECK: blendvps
 ;CHECK: ret
@@ -47,7 +64,7 @@ define <16 x i8> @vsel_i8(<16 x i8> %v1, <16 x i8> %v2) {
 ;; TEST blend + compares
 ; CHECK: A
 define <2 x double> @A(<2 x double> %x, <2 x double> %y) {
-  ; CHECK: cmpltpd
+  ; CHECK: cmplepd
   ; CHECK: blendvpd
   %max_is_x = fcmp oge <2 x double> %x, %y
   %max = select <2 x i1> %max_is_x, <2 x double> %x, <2 x double> %y
@@ -56,10 +73,18 @@ define <2 x double> @A(<2 x double> %x, <2 x double> %y) {
 
 ; CHECK: B
 define <2 x double> @B(<2 x double> %x, <2 x double> %y) {
-  ; CHECK: cmplepd
+  ; CHECK: cmpnlepd
   ; CHECK: blendvpd
-  %max_is_x = fcmp ogt <2 x double> %x, %y
-  %max = select <2 x i1> %max_is_x, <2 x double> %x, <2 x double> %y
-  ret <2 x double> %max
+  %min_is_x = fcmp ult <2 x double> %x, %y
+  %min = select <2 x i1> %min_is_x, <2 x double> %x, <2 x double> %y
+  ret <2 x double> %min
 }
 
+; CHECK: float_crash
+define void @float_crash() nounwind {
+entry:
+  %merge205vector_func.i = select <4 x i1> undef, <4 x double> undef, <4 x double> undef
+  %extract214vector_func.i = extractelement <4 x double> %merge205vector_func.i, i32 0
+  store double %extract214vector_func.i, double addrspace(1)* undef, align 8
+  ret void
+}