CodeGen peephole: fold redundant phys reg copies

[oota-llvm.git] / test / CodeGen / X86 / sse4a.ll

diff --git a/test/CodeGen/X86/sse4a.ll b/test/CodeGen/X86/sse4a.ll
index 076e21336492906cf2075ae796996523697ecedf..f8fa125f98e72358fec6fb1f43ef91076673f897 100644 (file)
--- a/test/CodeGen/X86/sse4a.ll
+++ b/test/CodeGen/X86/sse4a.ll
@@ -1,7 +1,8 @@
 ; RUN: llc < %s -mtriple=i686-apple-darwin9 -mattr=sse4a | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-unknown-linux -mattr=sse4a | FileCheck %s
 
 define void @test1(i8* %p, <4 x float> %a) nounwind optsize ssp {
-; CHECK: test1:
+; CHECK-LABEL: test1:
 ; CHECK: movntss
   tail call void @llvm.x86.sse4a.movnt.ss(i8* %p, <4 x float> %a) nounwind
   ret void
@@ -10,7 +11,7 @@ define void @test1(i8* %p, <4 x float> %a) nounwind optsize ssp {
 declare void @llvm.x86.sse4a.movnt.ss(i8*, <4 x float>)
 
 define void @test2(i8* %p, <2 x double> %a) nounwind optsize ssp {
-; CHECK: test2:
+; CHECK-LABEL: test2:
 ; CHECK: movntsd
   tail call void @llvm.x86.sse4a.movnt.sd(i8* %p, <2 x double> %a) nounwind
   ret void
@@ -19,7 +20,7 @@ define void @test2(i8* %p, <2 x double> %a) nounwind optsize ssp {
 declare void @llvm.x86.sse4a.movnt.sd(i8*, <2 x double>)
 
 define <2 x i64> @test3(<2 x i64> %x) nounwind uwtable ssp {
-; CHECK: test3:
+; CHECK-LABEL: test3:
 ; CHECK: extrq
   %1 = tail call <2 x i64> @llvm.x86.sse4a.extrqi(<2 x i64> %x, i8 3, i8 2)
   ret <2 x i64> %1
@@ -28,7 +29,7 @@ define <2 x i64> @test3(<2 x i64> %x) nounwind uwtable ssp {
 declare <2 x i64> @llvm.x86.sse4a.extrqi(<2 x i64>, i8, i8) nounwind
 
 define <2 x i64> @test4(<2 x i64> %x, <2 x i64> %y) nounwind uwtable ssp {
-; CHECK: test4:
+; CHECK-LABEL: test4:
 ; CHECK: extrq
   %1 = bitcast <2 x i64> %y to <16 x i8>
   %2 = tail call <2 x i64> @llvm.x86.sse4a.extrq(<2 x i64> %x, <16 x i8> %1) nounwind
@@ -38,7 +39,7 @@ define <2 x i64> @test4(<2 x i64> %x, <2 x i64> %y) nounwind uwtable ssp {
 declare <2 x i64> @llvm.x86.sse4a.extrq(<2 x i64>, <16 x i8>) nounwind
 
 define <2 x i64> @test5(<2 x i64> %x, <2 x i64> %y) nounwind uwtable ssp {
-; CHECK: test5:
+; CHECK-LABEL: test5:
 ; CHECK: insertq
   %1 = tail call <2 x i64> @llvm.x86.sse4a.insertqi(<2 x i64> %x, <2 x i64> %y, i8 5, i8 6)
   ret <2 x i64> %1
@@ -47,7 +48,7 @@ define <2 x i64> @test5(<2 x i64> %x, <2 x i64> %y) nounwind uwtable ssp {
 declare <2 x i64> @llvm.x86.sse4a.insertqi(<2 x i64>, <2 x i64>, i8, i8) nounwind
 
 define <2 x i64> @test6(<2 x i64> %x, <2 x i64> %y) nounwind uwtable ssp {
-; CHECK: test6:
+; CHECK-LABEL: test6:
 ; CHECK: insertq
   %1 = tail call <2 x i64> @llvm.x86.sse4a.insertq(<2 x i64> %x, <2 x i64> %y) nounwind
   ret <2 x i64> %1