CodeGen peephole: fold redundant phys reg copies

[oota-llvm.git] / test / CodeGen / X86 / store_op_load_fold2.ll

diff --git a/test/CodeGen/X86/store_op_load_fold2.ll b/test/CodeGen/X86/store_op_load_fold2.ll
index 705fdcdc13af55863ded55ea3b4f2f63d79b5f61..f47d87f4bb894c9f2d0017c23606704222d84e80 100644 (file)
--- a/test/CodeGen/X86/store_op_load_fold2.ll
+++ b/test/CodeGen/X86/store_op_load_fold2.ll
@@ -6,10 +6,10 @@ target datalayout = "e-p:32:32"
 
 define internal fastcc i32 @dct_chroma(i32 %uv, i32 %cr_cbp) nounwind {
 cond_true2732.preheader:                ; preds = %entry
-        %tmp2666 = getelementptr %struct.Macroblock* null, i32 0, i32 13                ; <i64*> [#uses=2]
+        %tmp2666 = getelementptr %struct.Macroblock, %struct.Macroblock* null, i32 0, i32 13                ; <i64*> [#uses=2]
         %tmp2674 = trunc i32 0 to i8            ; <i8> [#uses=1]
-        %tmp2667.us.us = load i64* %tmp2666             ; <i64> [#uses=1]
-        %tmp2670.us.us = load i64* null         ; <i64> [#uses=1]
+        %tmp2667.us.us = load i64, i64* %tmp2666             ; <i64> [#uses=1]
+        %tmp2670.us.us = load i64, i64* null         ; <i64> [#uses=1]
         %shift.upgrd.1 = zext i8 %tmp2674 to i64                ; <i64> [#uses=1]
         %tmp2675.us.us = shl i64 %tmp2670.us.us, %shift.upgrd.1         ; <i64> [#uses=1]
         %tmp2675not.us.us = xor i64 %tmp2675.us.us, -1          ; <i64> [#uses=1]