CodeGen peephole: fold redundant phys reg copies

[oota-llvm.git] / test / CodeGen / X86 / subreg-to-reg-6.ll

diff --git a/test/CodeGen/X86/subreg-to-reg-6.ll b/test/CodeGen/X86/subreg-to-reg-6.ll
index 76430cd783e365cafa4e7cdf67dadb52bb7df142..bef09fa944ef01d11bc122030915676782dd0517 100644 (file)
--- a/test/CodeGen/X86/subreg-to-reg-6.ll
+++ b/test/CodeGen/X86/subreg-to-reg-6.ll
@@ -2,7 +2,7 @@
 
 define i64 @foo() nounwind {
 entry:
-       %t0 = load i32* null, align 8
+       %t0 = load i32, i32* null, align 8
        switch i32 %t0, label %bb65 [
                i32 16, label %bb
                i32 12, label %bb56