CodeGen peephole: fold redundant phys reg copies

[oota-llvm.git] / test / CodeGen / X86 / switch-or.ll

diff --git a/test/CodeGen/X86/switch-or.ll b/test/CodeGen/X86/switch-or.ll
index 6e6b013d9fa89c007265ae93480fc8cb7753f8a4..4642accfff8d96672ae36ec0cfd008bd2867f03d 100644 (file)
--- a/test/CodeGen/X86/switch-or.ll
+++ b/test/CodeGen/X86/switch-or.ll
@@ -1,10 +1,11 @@
 ; RUN: llc -march=x86 -asm-verbose=false < %s | FileCheck %s
 
 ; Check that merging switch cases that differ in one bit works.
+; CHECK-LABEL: test1
 ; CHECK: orl $2
 ; CHECK-NEXT: cmpl $6
 
-define void @foo(i32 %variable) nounwind {
+define void @test1(i32 %variable) nounwind {
 entry:
   switch i32 %variable, label %if.end [
     i32 4, label %if.then
@@ -19,4 +20,22 @@ if.end:
   ret void
 }
 
+; CHECK-LABEL: test2
+; CHECK: orl $-2147483648
+; CHECK-NEXT: cmpl $-2147483648
+define void @test2(i32 %variable) nounwind {
+entry:
+  switch i32 %variable, label %if.end [
+    i32 0, label %if.then
+    i32 -2147483648, label %if.then
+  ]
+
+if.then:
+  %call = tail call i32 (...) @bar() nounwind
+  ret void
+
+if.end:
+  ret void
+}
+
 declare i32 @bar(...) nounwind