Implement gpword directive for mips, test case added. Stype changes using clang-forma...

[oota-llvm.git] / test / CodeGen / X86 / test-shrink.ll

diff --git a/test/CodeGen/X86/test-shrink.ll b/test/CodeGen/X86/test-shrink.ll
index bbf727a45a5b140c162a1dc2f4aa3f15e07bc523..c9b76c88c1a2995976b6fa3a127bc79130a09411 100644 (file)
--- a/test/CodeGen/X86/test-shrink.ll
+++ b/test/CodeGen/X86/test-shrink.ll
@@ -1,10 +1,11 @@
-; RUN: llvm-as < %s | llc -march=x86-64 | FileCheck %s --check-prefix=CHECK-64
-; RUN: llvm-as < %s | llc -march=x86 | FileCheck %s --check-prefix=CHECK-32
+; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s --check-prefix=CHECK-64
+; RUN: llc < %s -mtriple=x86_64-win32 | FileCheck %s --check-prefix=CHECK-64
+; RUN: llc < %s -march=x86 | FileCheck %s --check-prefix=CHECK-32
 
-; CHECK-64: g64xh:
-; CHECK-64:   testb $8, %ah
+; CHECK-64-LABEL: g64xh:
+; CHECK-64:   testb $8, {{%ah|%ch}}
 ; CHECK-64:   ret
-; CHECK-32: g64xh:
+; CHECK-32-LABEL: g64xh:
 ; CHECK-32:   testb $8, %ah
 ; CHECK-32:   ret
 define void @g64xh(i64 inreg %x) nounwind {
@@ -18,10 +19,10 @@ yes:
 no:
   ret void
 }
-; CHECK-64: g64xl:
-; CHECK-64:   testb $8, %dil
+; CHECK-64-LABEL: g64xl:
+; CHECK-64:   testb $8, [[A0L:%dil|%cl]]
 ; CHECK-64:   ret
-; CHECK-32: g64xl:
+; CHECK-32-LABEL: g64xl:
 ; CHECK-32:   testb $8, %al
 ; CHECK-32:   ret
 define void @g64xl(i64 inreg %x) nounwind {
@@ -35,10 +36,10 @@ yes:
 no:
   ret void
 }
-; CHECK-64: g32xh:
-; CHECK-64:   testb $8, %ah
+; CHECK-64-LABEL: g32xh:
+; CHECK-64:   testb $8, {{%ah|%ch}}
 ; CHECK-64:   ret
-; CHECK-32: g32xh:
+; CHECK-32-LABEL: g32xh:
 ; CHECK-32:   testb $8, %ah
 ; CHECK-32:   ret
 define void @g32xh(i32 inreg %x) nounwind {
@@ -52,10 +53,10 @@ yes:
 no:
   ret void
 }
-; CHECK-64: g32xl:
-; CHECK-64:   testb $8, %dil
+; CHECK-64-LABEL: g32xl:
+; CHECK-64:   testb $8, [[A0L]]
 ; CHECK-64:   ret
-; CHECK-32: g32xl:
+; CHECK-32-LABEL: g32xl:
 ; CHECK-32:   testb $8, %al
 ; CHECK-32:   ret
 define void @g32xl(i32 inreg %x) nounwind {
@@ -69,10 +70,10 @@ yes:
 no:
   ret void
 }
-; CHECK-64: g16xh:
-; CHECK-64:   testb $8, %ah
+; CHECK-64-LABEL: g16xh:
+; CHECK-64:   testb $8, {{%ah|%ch}}
 ; CHECK-64:   ret
-; CHECK-32: g16xh:
+; CHECK-32-LABEL: g16xh:
 ; CHECK-32:   testb $8, %ah
 ; CHECK-32:   ret
 define void @g16xh(i16 inreg %x) nounwind {
@@ -86,10 +87,10 @@ yes:
 no:
   ret void
 }
-; CHECK-64: g16xl:
-; CHECK-64:   testb $8, %dil
+; CHECK-64-LABEL: g16xl:
+; CHECK-64:   testb $8, [[A0L]]
 ; CHECK-64:   ret
-; CHECK-32: g16xl:
+; CHECK-32-LABEL: g16xl:
 ; CHECK-32:   testb $8, %al
 ; CHECK-32:   ret
 define void @g16xl(i16 inreg %x) nounwind {
@@ -103,11 +104,11 @@ yes:
 no:
   ret void
 }
-; CHECK-64: g64x16:
-; CHECK-64:   testw $32896, %di
+; CHECK-64-LABEL: g64x16:
+; CHECK-64:   testw $-32640, %[[A0W:di|cx]]
 ; CHECK-64:   ret
-; CHECK-32: g64x16:
-; CHECK-32:   testw $32896, %ax
+; CHECK-32-LABEL: g64x16:
+; CHECK-32:   testw $-32640, %ax
 ; CHECK-32:   ret
 define void @g64x16(i64 inreg %x) nounwind {
   %t = and i64 %x, 32896
@@ -120,11 +121,11 @@ yes:
 no:
   ret void
 }
-; CHECK-64: g32x16:
-; CHECK-64:   testw $32896, %di
+; CHECK-64-LABEL: g32x16:
+; CHECK-64:   testw $-32640, %[[A0W]]
 ; CHECK-64:   ret
-; CHECK-32: g32x16:
-; CHECK-32:   testw $32896, %ax
+; CHECK-32-LABEL: g32x16:
+; CHECK-32:   testw $-32640, %ax
 ; CHECK-32:   ret
 define void @g32x16(i32 inreg %x) nounwind {
   %t = and i32 %x, 32896
@@ -137,10 +138,10 @@ yes:
 no:
   ret void
 }
-; CHECK-64: g64x32:
-; CHECK-64:   testl $268468352, %edi
+; CHECK-64-LABEL: g64x32:
+; CHECK-64:   testl $268468352, %e[[A0W]]
 ; CHECK-64:   ret
-; CHECK-32: g64x32:
+; CHECK-32-LABEL: g64x32:
 ; CHECK-32:   testl $268468352, %eax
 ; CHECK-32:   ret
 define void @g64x32(i64 inreg %x) nounwind {