Enable all Hexagon tests.

[oota-llvm.git] / test / CodeGen / X86 / vec_insert.ll

diff --git a/test/CodeGen/X86/vec_insert.ll b/test/CodeGen/X86/vec_insert.ll
index c8c9f141ec1c4eccac5dad564c459babec66f255..4e5d445ff62394a5d83aaec0e61c8a441b4ac50e 100644 (file)
--- a/test/CodeGen/X86/vec_insert.ll
+++ b/test/CodeGen/X86/vec_insert.ll
@@ -1,16 +1,16 @@
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep movss | count 1
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | not grep pinsrw
+; RUN: llc < %s -march=x86 -mattr=+sse2,-sse41 | grep movss | count 1
+; RUN: llc < %s -march=x86 -mattr=+sse2,-sse41 | not grep pinsrw
 
-define void @test(<4 x float>* %F, i32 %I) {
+define void @test(<4 x float>* %F, i32 %I) nounwind {
        %tmp = load <4 x float>* %F             ; <<4 x float>> [#uses=1]
        %f = sitofp i32 %I to float             ; <float> [#uses=1]
        %tmp1 = insertelement <4 x float> %tmp, float %f, i32 0         ; <<4 x float>> [#uses=2]
-       %tmp18 = add <4 x float> %tmp1, %tmp1           ; <<4 x float>> [#uses=1]
+       %tmp18 = fadd <4 x float> %tmp1, %tmp1          ; <<4 x float>> [#uses=1]
        store <4 x float> %tmp18, <4 x float>* %F
        ret void
 }
 
-define void @test2(<4 x float>* %F, i32 %I, float %g) {
+define void @test2(<4 x float>* %F, i32 %I, float %g) nounwind {
        %tmp = load <4 x float>* %F             ; <<4 x float>> [#uses=1]
        %f = sitofp i32 %I to float             ; <float> [#uses=1]
        %tmp1 = insertelement <4 x float> %tmp, float %f, i32 2         ; <<4 x float>> [#uses=1]