CodeGen peephole: fold redundant phys reg copies

[oota-llvm.git] / test / CodeGen / X86 / vec_reassociate.ll

diff --git a/test/CodeGen/X86/vec_reassociate.ll b/test/CodeGen/X86/vec_reassociate.ll
index 61cc1ff186a911d6b88bc5a115de7a99360fd266..bf2053f784240ea04c591b4d76c0f4dbad50513e 100644 (file)
--- a/test/CodeGen/X86/vec_reassociate.ll
+++ b/test/CodeGen/X86/vec_reassociate.ll
@@ -11,11 +11,22 @@ define <4 x i32> @add_4i32(<4 x i32> %a0, <4 x i32> %a1) {
   ret <4 x i32> %3\r
 }\r
 \r
+define <4 x i32> @add_4i32_commute(<4 x i32> %a0, <4 x i32> %a1) {\r
+  ;CHECK-LABEL:  @add_4i32_commute\r
+  ;CHECK:        # BB#0:\r
+  ;CHECK-NEXT:   paddd %xmm1, %xmm0\r
+  ;CHECK-NEXT:   retq\r
+  %1 = add <4 x i32> <i32  1, i32 -2, i32  3, i32 -4>, %a0\r
+  %2 = add <4 x i32> <i32 -1, i32  2, i32 -3, i32  4>, %a1\r
+  %3 = add <4 x i32> %1, %2\r
+  ret <4 x i32> %3\r
+}\r
+\r
 define <4 x i32> @mul_4i32(<4 x i32> %a0, <4 x i32> %a1) {\r
   ;CHECK-LABEL:  @mul_4i32\r
   ;CHECK:        # BB#0:\r
   ;CHECK-NEXT:   pmulld %xmm1, %xmm0\r
-  ;CHECK-NEXT:   pmulld .LCPI1_0(%rip), %xmm0\r
+  ;CHECK-NEXT:   pmulld .LCPI2_0(%rip), %xmm0\r
   ;CHECK-NEXT:   retq\r
   %1 = mul <4 x i32> %a0, <i32 1, i32 2, i32 3, i32 4>\r
   %2 = mul <4 x i32> %a1, <i32 4, i32 3, i32 2, i32 1>\r
@@ -23,11 +34,23 @@ define <4 x i32> @mul_4i32(<4 x i32> %a0, <4 x i32> %a1) {
   ret <4 x i32> %3\r
 }\r
 \r
+define <4 x i32> @mul_4i32_commute(<4 x i32> %a0, <4 x i32> %a1) {\r
+  ;CHECK-LABEL:  @mul_4i32_commute\r
+  ;CHECK:        # BB#0:\r
+  ;CHECK-NEXT:   pmulld %xmm1, %xmm0\r
+  ;CHECK-NEXT:   pmulld .LCPI3_0(%rip), %xmm0\r
+  ;CHECK-NEXT:   retq\r
+  %1 = mul <4 x i32> <i32 1, i32 2, i32 3, i32 4>, %a0\r
+  %2 = mul <4 x i32> <i32 4, i32 3, i32 2, i32 1>, %a1\r
+  %3 = mul <4 x i32> %1, %2\r
+  ret <4 x i32> %3\r
+}\r
+\r
 define <4 x i32> @and_4i32(<4 x i32> %a0, <4 x i32> %a1) {\r
   ;CHECK-LABEL:  @and_4i32\r
   ;CHECK:        # BB#0:\r
   ;CHECK-NEXT:   andps %xmm1, %xmm0\r
-  ;CHECK-NEXT:   andps .LCPI2_0(%rip), %xmm0\r
+  ;CHECK-NEXT:   andps .LCPI4_0(%rip), %xmm0\r
   ;CHECK-NEXT:   retq\r
   %1 = and <4 x i32> %a0, <i32 -2, i32 -2, i32  3, i32  3>\r
   %2 = and <4 x i32> %a1, <i32 -1, i32 -1, i32  1, i32  1>\r
@@ -35,11 +58,23 @@ define <4 x i32> @and_4i32(<4 x i32> %a0, <4 x i32> %a1) {
   ret <4 x i32> %3\r
 }\r
 \r
+define <4 x i32> @and_4i32_commute(<4 x i32> %a0, <4 x i32> %a1) {\r
+  ;CHECK-LABEL:  @and_4i32_commute\r
+  ;CHECK:        # BB#0:\r
+  ;CHECK-NEXT:   andps %xmm1, %xmm0\r
+  ;CHECK-NEXT:   andps .LCPI5_0(%rip), %xmm0\r
+  ;CHECK-NEXT:   retq\r
+  %1 = and <4 x i32> <i32 -2, i32 -2, i32  3, i32  3>, %a0\r
+  %2 = and <4 x i32> <i32 -1, i32 -1, i32  1, i32  1>, %a1\r
+  %3 = and <4 x i32> %1, %2\r
+  ret <4 x i32> %3\r
+}\r
+\r
 define <4 x i32> @or_4i32(<4 x i32> %a0, <4 x i32> %a1) {\r
   ;CHECK-LABEL:  @or_4i32\r
   ;CHECK:        # BB#0:\r
   ;CHECK-NEXT:   orps %xmm1, %xmm0\r
-  ;CHECK-NEXT:   orps .LCPI3_0(%rip), %xmm0\r
+  ;CHECK-NEXT:   orps .LCPI6_0(%rip), %xmm0\r
   ;CHECK-NEXT:   retq\r
   %1 = or <4 x i32> %a0, <i32 -2, i32 -2, i32  3, i32  3>\r
   %2 = or <4 x i32> %a1, <i32 -1, i32 -1, i32  1, i32  1>\r
@@ -47,14 +82,38 @@ define <4 x i32> @or_4i32(<4 x i32> %a0, <4 x i32> %a1) {
   ret <4 x i32> %3\r
 }\r
 \r
+define <4 x i32> @or_4i32_commute(<4 x i32> %a0, <4 x i32> %a1) {\r
+  ;CHECK-LABEL:  @or_4i32_commute\r
+  ;CHECK:        # BB#0:\r
+  ;CHECK-NEXT:   orps %xmm1, %xmm0\r
+  ;CHECK-NEXT:   orps .LCPI7_0(%rip), %xmm0\r
+  ;CHECK-NEXT:   retq\r
+  %1 = or <4 x i32> <i32 -2, i32 -2, i32  3, i32  3>, %a0 \r
+  %2 = or <4 x i32> <i32 -1, i32 -1, i32  1, i32  1>, %a1\r
+  %3 = or <4 x i32> %1, %2\r
+  ret <4 x i32> %3\r
+}\r
+\r
 define <4 x i32> @xor_4i32(<4 x i32> %a0, <4 x i32> %a1) {\r
   ;CHECK-LABEL:  @xor_4i32\r
   ;CHECK:        # BB#0:\r
   ;CHECK-NEXT:   xorps %xmm1, %xmm0\r
-  ;CHECK-NEXT:   xorps .LCPI4_0(%rip), %xmm0\r
+  ;CHECK-NEXT:   xorps .LCPI8_0(%rip), %xmm0\r
   ;CHECK-NEXT:   retq\r
   %1 = xor <4 x i32> %a0, <i32 -2, i32 -2, i32  3, i32  3>\r
   %2 = xor <4 x i32> %a1, <i32 -1, i32 -1, i32  1, i32  1>\r
   %3 = xor <4 x i32> %1, %2\r
   ret <4 x i32> %3\r
 }\r
+\r
+define <4 x i32> @xor_4i32_commute(<4 x i32> %a0, <4 x i32> %a1) {\r
+  ;CHECK-LABEL:  @xor_4i32_commute\r
+  ;CHECK:        # BB#0:\r
+  ;CHECK-NEXT:   xorps %xmm1, %xmm0\r
+  ;CHECK-NEXT:   xorps .LCPI9_0(%rip), %xmm0\r
+  ;CHECK-NEXT:   retq\r
+  %1 = xor <4 x i32> <i32 -2, i32 -2, i32  3, i32  3>, %a0\r
+  %2 = xor <4 x i32> <i32 -1, i32 -1, i32  1, i32  1>, %a1\r
+  %3 = xor <4 x i32> %1, %2\r
+  ret <4 x i32> %3\r
+}\r