Enable all Hexagon tests.

[oota-llvm.git] / test / CodeGen / X86 / vec_set-B.ll

diff --git a/test/CodeGen/X86/vec_set-B.ll b/test/CodeGen/X86/vec_set-B.ll
index a53116c92d1b102e62b15464e813985f8d19830d..f5b3e8baa33a90dec0623e7583a4ff5d17b2a837 100644 (file)
--- a/test/CodeGen/X86/vec_set-B.ll
+++ b/test/CodeGen/X86/vec_set-B.ll
@@ -1,5 +1,5 @@
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | not grep movaps
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep esp | count 2
+; RUN: llc < %s -march=x86 -mattr=+sse2 | not grep movaps
+; RUN: llc < %s -march=x86 -mattr=+sse2 | grep esp | count 2
 
 ; These should both generate something like this:
 ;_test3:
@@ -8,14 +8,14 @@
 ;      movd    %eax, %xmm0
 ;      ret
 
-define <2 x i64> @test3(i64 %arg) {
+define <2 x i64> @test3(i64 %arg) nounwind {
 entry:
         %A = and i64 %arg, 1234567
         %B = insertelement <2 x i64> zeroinitializer, i64 %A, i32 0
         ret <2 x i64> %B
 }
 
-define <2 x i64> @test2(i64 %arg) {
+define <2 x i64> @test2(i64 %arg) nounwind {
 entry:
        %A = and i64 %arg, 1234567
        %B = insertelement <2 x i64> undef, i64 %A, i32 0