; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -x86-experimental-vector-shuffle-lowering | FileCheck %s --check-prefix=ALL --check-prefix=SSE2
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=+sse3 -x86-experimental-vector-shuffle-lowering | FileCheck %s --check-prefix=ALL --check-prefix=SSE3
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=+ssse3 -x86-experimental-vector-shuffle-lowering | FileCheck %s --check-prefix=ALL --check-prefix=SSSE3
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=+sse4.1 -x86-experimental-vector-shuffle-lowering | FileCheck %s --check-prefix=ALL --check-prefix=SSE41
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=+avx -x86-experimental-vector-shuffle-lowering | FileCheck %s --check-prefix=ALL --check-prefix=AVX1
%shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 3, i32 2, i32 1, i32 0>
ret <4 x float> %shuffle
}
+define <4 x float> @shuffle_v4f32_0011(<4 x float> %a, <4 x float> %b) {
+; ALL-LABEL: @shuffle_v4f32_0011
+; ALL: unpcklps {{.*}} # xmm0 = xmm0[0,0,1,1]
+; ALL-NEXT: retq
+ %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 0, i32 0, i32 1, i32 1>
+ ret <4 x float> %shuffle
+}
+define <4 x float> @shuffle_v4f32_2233(<4 x float> %a, <4 x float> %b) {
+; ALL-LABEL: @shuffle_v4f32_2233
+; ALL: unpckhps {{.*}} # xmm0 = xmm0[2,2,3,3]
+; ALL-NEXT: retq
+ %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 2, i32 2, i32 3, i32 3>
+ ret <4 x float> %shuffle
+}
define <4 x float> @shuffle_v4f32_0022(<4 x float> %a, <4 x float> %b) {
; SSE2-LABEL: @shuffle_v4f32_0022
; SSE2: shufps {{.*}} # xmm0 = xmm0[0,0,2,2]
; SSE2-NEXT: retq
;
+; SSE3-LABEL: @shuffle_v4f32_0022
+; SSE3: movsldup {{.*}} # xmm0 = xmm0[0,0,2,2]
+; SSE3-NEXT: retq
+;
+; SSSE3-LABEL: @shuffle_v4f32_0022
+; SSSE3: movsldup {{.*}} # xmm0 = xmm0[0,0,2,2]
+; SSSE3-NEXT: retq
+;
; SSE41-LABEL: @shuffle_v4f32_0022
; SSE41: movsldup {{.*}} # xmm0 = xmm0[0,0,2,2]
; SSE41-NEXT: retq
; SSE2: shufps {{.*}} # xmm0 = xmm0[1,1,3,3]
; SSE2-NEXT: retq
;
+; SSE3-LABEL: @shuffle_v4f32_1133
+; SSE3: movshdup {{.*}} # xmm0 = xmm0[1,1,3,3]
+; SSE3-NEXT: retq
+;
+; SSSE3-LABEL: @shuffle_v4f32_1133
+; SSSE3: movshdup {{.*}} # xmm0 = xmm0[1,1,3,3]
+; SSSE3-NEXT: retq
+;
; SSE41-LABEL: @shuffle_v4f32_1133
; SSE41: movshdup {{.*}} # xmm0 = xmm0[1,1,3,3]
; SSE41-NEXT: retq
; SSE2-NEXT: shufps {{.*}} # xmm0 = xmm0[0,1],xmm1[2,0]
; SSE2-NEXT: retq
;
+; SSE3-LABEL: @shuffle_v4i32_0124
+; SSE3: shufps {{.*}} # xmm1 = xmm1[0,0],xmm0[2,0]
+; SSE3-NEXT: shufps {{.*}} # xmm0 = xmm0[0,1],xmm1[2,0]
+; SSE3-NEXT: retq
+;
+; SSSE3-LABEL: @shuffle_v4i32_0124
+; SSSE3: shufps {{.*}} # xmm1 = xmm1[0,0],xmm0[2,0]
+; SSSE3-NEXT: shufps {{.*}} # xmm0 = xmm0[0,1],xmm1[2,0]
+; SSSE3-NEXT: retq
+;
; SSE41-LABEL: @shuffle_v4i32_0124
; SSE41: insertps {{.*}} # xmm0 = xmm0[0,1,2],xmm1[0]
; SSE41-NEXT: retq
; SSE2-NEXT: movaps %xmm1, %xmm0
; SSE2-NEXT: retq
;
+; SSE3-LABEL: @shuffle_v4i32_0412
+; SSE3: shufps {{.*}} # xmm1 = xmm1[0,0],xmm0[0,0]
+; SSE3-NEXT: shufps {{.*}} # xmm1 = xmm1[2,0],xmm0[1,2]
+; SSE3-NEXT: movaps %xmm1, %xmm0
+; SSE3-NEXT: retq
+;
+; SSSE3-LABEL: @shuffle_v4i32_0412
+; SSSE3: shufps {{.*}} # xmm1 = xmm1[0,0],xmm0[0,0]
+; SSSE3-NEXT: shufps {{.*}} # xmm1 = xmm1[2,0],xmm0[1,2]
+; SSSE3-NEXT: movaps %xmm1, %xmm0
+; SSSE3-NEXT: retq
+;
+; SSE41-LABEL: @shuffle_v4i32_0412
+; SSE41: shufps {{.*}} # xmm1 = xmm1[0,0],xmm0[0,0]
+; SSE41-NEXT: shufps {{.*}} # xmm1 = xmm1[2,0],xmm0[1,2]
+; SSE41-NEXT: movaps %xmm1, %xmm0
+; SSE41-NEXT: retq
+;
; AVX1-LABEL: @shuffle_v4i32_0412
; AVX1: vshufps {{.*}} # xmm1 = xmm1[0,0],xmm0[0,0]
; AVX1-NEXT: vshufps {{.*}} # xmm0 = xmm1[2,0],xmm0[1,2]
; SSE2-NEXT: movaps %xmm1, %xmm0
; SSE2-NEXT: retq
;
+; SSE3-LABEL: @shuffle_v4i32_4012
+; SSE3: shufps {{.*}} # xmm1 = xmm1[0,0],xmm0[0,0]
+; SSE3-NEXT: shufps {{.*}} # xmm1 = xmm1[0,2],xmm0[1,2]
+; SSE3-NEXT: movaps %xmm1, %xmm0
+; SSE3-NEXT: retq
+;
+; SSSE3-LABEL: @shuffle_v4i32_4012
+; SSSE3: shufps {{.*}} # xmm1 = xmm1[0,0],xmm0[0,0]
+; SSSE3-NEXT: shufps {{.*}} # xmm1 = xmm1[0,2],xmm0[1,2]
+; SSSE3-NEXT: movaps %xmm1, %xmm0
+; SSSE3-NEXT: retq
+;
+; SSE41-LABEL: @shuffle_v4i32_4012
+; SSE41: shufps {{.*}} # xmm1 = xmm1[0,0],xmm0[0,0]
+; SSE41-NEXT: shufps {{.*}} # xmm1 = xmm1[0,2],xmm0[1,2]
+; SSE41-NEXT: movaps %xmm1, %xmm0
+; SSE41-NEXT: retq
+;
; AVX1-LABEL: @shuffle_v4i32_4012
; AVX1: vshufps {{.*}} # xmm1 = xmm1[0,0],xmm0[0,0]
; AVX1-NEXT: vshufps {{.*}} # xmm0 = xmm1[0,2],xmm0[1,2]
; SSE2-NEXT: movdqa %xmm1, %xmm0
; SSE2-NEXT: retq
;
+; SSE3-LABEL: @shuffle_v4i32_4501
+; SSE3: punpcklqdq {{.*}} # xmm1 = xmm1[0],xmm0[0]
+; SSE3-NEXT: movdqa %xmm1, %xmm0
+; SSE3-NEXT: retq
+;
+; SSSE3-LABEL: @shuffle_v4i32_4501
+; SSSE3: punpcklqdq {{.*}} # xmm1 = xmm1[0],xmm0[0]
+; SSSE3-NEXT: movdqa %xmm1, %xmm0
+; SSSE3-NEXT: retq
+;
+; SSE41-LABEL: @shuffle_v4i32_4501
+; SSE41: punpcklqdq {{.*}} # xmm1 = xmm1[0],xmm0[0]
+; SSE41-NEXT: movdqa %xmm1, %xmm0
+; SSE41-NEXT: retq
+;
; AVX1-LABEL: @shuffle_v4i32_4501
; AVX1: punpcklqdq {{.*}} # xmm0 = xmm1[0],xmm0[0]
; AVX1-NEXT: retq
; SSE2-NEXT: shufps {{.*}} # xmm0 = xmm0[0,2],[[X]][2,3]
; SSE2-NEXT: retq
;
+; SSE3-LABEL: @shuffle_v4f32_4zzz
+; SSE3: xorps %[[X:xmm[0-9]+]], %[[X]]
+; SSE3-NEXT: shufps {{.*}} # xmm0 = xmm0[0,0],[[X]][1,0]
+; SSE3-NEXT: shufps {{.*}} # xmm0 = xmm0[0,2],[[X]][2,3]
+; SSE3-NEXT: retq
+;
+; SSSE3-LABEL: @shuffle_v4f32_4zzz
+; SSSE3: xorps %[[X:xmm[0-9]+]], %[[X]]
+; SSSE3-NEXT: shufps {{.*}} # xmm0 = xmm0[0,0],[[X]][1,0]
+; SSSE3-NEXT: shufps {{.*}} # xmm0 = xmm0[0,2],[[X]][2,3]
+; SSSE3-NEXT: retq
+;
; SSE41-LABEL: @shuffle_v4f32_4zzz
; SSE41: xorps %[[X:xmm[0-9]+]], %[[X]]
; SSE41-NEXT: blendps {{.*}} # [[X]] = xmm0[0],[[X]][1,2,3]
; SSE2-NEXT: shufps {{.*}} # xmm0 = xmm0[2,0],[[X]][3,0]
; SSE2-NEXT: retq
;
+; SSE3-LABEL: @shuffle_v4f32_z4zz
+; SSE3: xorps %[[X:xmm[0-9]+]], %[[X]]
+; SSE3-NEXT: shufps {{.*}} # xmm0 = xmm0[0,0],[[X]][2,0]
+; SSE3-NEXT: shufps {{.*}} # xmm0 = xmm0[2,0],[[X]][3,0]
+; SSE3-NEXT: retq
+;
+; SSSE3-LABEL: @shuffle_v4f32_z4zz
+; SSSE3: xorps %[[X:xmm[0-9]+]], %[[X]]
+; SSSE3-NEXT: shufps {{.*}} # xmm0 = xmm0[0,0],[[X]][2,0]
+; SSSE3-NEXT: shufps {{.*}} # xmm0 = xmm0[2,0],[[X]][3,0]
+; SSSE3-NEXT: retq
+;
; SSE41-LABEL: @shuffle_v4f32_z4zz
; SSE41: insertps {{.*}} # xmm0 = zero,xmm0[0],zero,zero
; SSE41-NEXT: retq
; SSE2-NEXT: movaps %[[X]], %xmm0
; SSE2-NEXT: retq
;
+; SSE3-LABEL: @shuffle_v4f32_zz4z
+; SSE3: xorps %[[X:xmm[0-9]+]], %[[X]]
+; SSE3-NEXT: shufps {{.*}} # xmm0 = xmm0[0,0],[[X]][0,0]
+; SSE3-NEXT: shufps {{.*}} # [[X]] = [[X]][0,0],xmm0[0,2]
+; SSE3-NEXT: movaps %[[X]], %xmm0
+; SSE3-NEXT: retq
+;
+; SSSE3-LABEL: @shuffle_v4f32_zz4z
+; SSSE3: xorps %[[X:xmm[0-9]+]], %[[X]]
+; SSSE3-NEXT: shufps {{.*}} # xmm0 = xmm0[0,0],[[X]][0,0]
+; SSSE3-NEXT: shufps {{.*}} # [[X]] = [[X]][0,0],xmm0[0,2]
+; SSSE3-NEXT: movaps %[[X]], %xmm0
+; SSSE3-NEXT: retq
+;
; SSE41-LABEL: @shuffle_v4f32_zz4z
; SSE41: insertps {{.*}} # xmm0 = zero,zero,xmm0[0],zero
; SSE41-NEXT: retq
; SSE2-NEXT: movaps %[[X]], %xmm0
; SSE2-NEXT: retq
;
+; SSE3-LABEL: @shuffle_v4f32_zuu4
+; SSE3: xorps %[[X:xmm[0-9]+]], %[[X]]
+; SSE3-NEXT: shufps {{.*}} # [[X]] = [[X]][0,1],xmm0[2,0]
+; SSE3-NEXT: movaps %[[X]], %xmm0
+; SSE3-NEXT: retq
+;
+; SSSE3-LABEL: @shuffle_v4f32_zuu4
+; SSSE3: xorps %[[X:xmm[0-9]+]], %[[X]]
+; SSSE3-NEXT: shufps {{.*}} # [[X]] = [[X]][0,1],xmm0[2,0]
+; SSSE3-NEXT: movaps %[[X]], %xmm0
+; SSSE3-NEXT: retq
+;
; SSE41-LABEL: @shuffle_v4f32_zuu4
; SSE41: insertps {{.*}} # xmm0 = zero,zero,zero,xmm0[0]
; SSE41-NEXT: retq
; SSE2-NEXT: movaps %[[X]], %xmm0
; SSE2-NEXT: retq
;
+; SSE3-LABEL: @shuffle_v4f32_zzz7
+; SSE3: xorps %[[X:xmm[0-9]+]], %[[X]]
+; SSE3-NEXT: shufps {{.*}} # xmm0 = xmm0[3,0],[[X]][2,0]
+; SSE3-NEXT: shufps {{.*}} # [[X]] = [[X]][0,1],xmm0[2,0]
+; SSE3-NEXT: movaps %[[X]], %xmm0
+; SSE3-NEXT: retq
+;
+; SSSE3-LABEL: @shuffle_v4f32_zzz7
+; SSSE3: xorps %[[X:xmm[0-9]+]], %[[X]]
+; SSSE3-NEXT: shufps {{.*}} # xmm0 = xmm0[3,0],[[X]][2,0]
+; SSSE3-NEXT: shufps {{.*}} # [[X]] = [[X]][0,1],xmm0[2,0]
+; SSSE3-NEXT: movaps %[[X]], %xmm0
+; SSSE3-NEXT: retq
+;
; SSE41-LABEL: @shuffle_v4f32_zzz7
; SSE41: xorps %[[X:xmm[0-9]+]], %[[X]]
; SSE41-NEXT: blendps {{.*}} # [[X]] = [[X]][0,1,2],xmm0[3]
; SSE2-NEXT: shufps {{.*}} # xmm0 = xmm0[2,0],[[X]][2,3]
; SSE2-NEXT: retq
;
+; SSE3-LABEL: @shuffle_v4f32_z6zz
+; SSE3: xorps %[[X:xmm[0-9]+]], %[[X]]
+; SSE3-NEXT: shufps {{.*}} # xmm0 = xmm0[2,0],[[X]][0,0]
+; SSE3-NEXT: shufps {{.*}} # xmm0 = xmm0[2,0],[[X]][2,3]
+; SSE3-NEXT: retq
+;
+; SSSE3-LABEL: @shuffle_v4f32_z6zz
+; SSSE3: xorps %[[X:xmm[0-9]+]], %[[X]]
+; SSSE3-NEXT: shufps {{.*}} # xmm0 = xmm0[2,0],[[X]][0,0]
+; SSSE3-NEXT: shufps {{.*}} # xmm0 = xmm0[2,0],[[X]][2,3]
+; SSSE3-NEXT: retq
+;
; SSE41-LABEL: @shuffle_v4f32_z6zz
; SSE41: insertps {{.*}} # xmm0 = zero,xmm0[2],zero,zero
; SSE41-NEXT: retq
%shuffle = shufflevector <4 x i32> zeroinitializer, <4 x i32> %a, <4 x i32> <i32 0, i32 6, i32 2, i32 3>
ret <4 x i32> %shuffle
}
+
+define <4 x i32> @shuffle_v4i32_7012(<4 x i32> %a, <4 x i32> %b) {
+; SSE2-LABEL: @shuffle_v4i32_7012
+; SSE2: # BB#0:
+; SSE2-NEXT: shufps {{.*}} # xmm1 = xmm1[3,0],xmm0[0,0]
+; SSE2-NEXT: shufps {{.*}} # xmm1 = xmm1[0,2],xmm0[1,2]
+; SSE2-NEXT: movaps %xmm1, %xmm0
+; SSE2-NEXT: retq
+;
+; SSE3-LABEL: @shuffle_v4i32_7012
+; SSE3: # BB#0:
+; SSE3-NEXT: shufps {{.*}} # xmm1 = xmm1[3,0],xmm0[0,0]
+; SSE3-NEXT: shufps {{.*}} # xmm1 = xmm1[0,2],xmm0[1,2]
+; SSE3-NEXT: movaps %xmm1, %xmm0
+; SSE3-NEXT: retq
+;
+; SSSE3-LABEL: @shuffle_v4i32_7012
+; SSSE3: # BB#0:
+; SSSE3-NEXT: palignr $12, {{.*}} # xmm0 = xmm1[12,13,14,15],xmm0[0,1,2,3,4,5,6,7,8,9,10,11]
+; SSSE3-NEXT: retq
+;
+; SSE41-LABEL: @shuffle_v4i32_7012
+; SSE41: # BB#0:
+; SSE41-NEXT: palignr $12, {{.*}} # xmm0 = xmm1[12,13,14,15],xmm0[0,1,2,3,4,5,6,7,8,9,10,11]
+; SSE41-NEXT: retq
+;
+; AVX1-LABEL: @shuffle_v4i32_7012
+; AVX1: # BB#0:
+; AVX1-NEXT: vpalignr $12, {{.*}} # xmm0 = xmm1[12,13,14,15],xmm0[0,1,2,3,4,5,6,7,8,9,10,11]
+; AVX1-NEXT: retq
+ %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 7, i32 0, i32 1, i32 2>
+ ret <4 x i32> %shuffle
+}
+
+define <4 x i32> @shuffle_v4i32_6701(<4 x i32> %a, <4 x i32> %b) {
+; SSE2-LABEL: @shuffle_v4i32_6701
+; SSE2: # BB#0:
+; SSE2-NEXT: shufpd {{.*}} # xmm1 = xmm1[1],xmm0[0]
+; SSE2-NEXT: movapd %xmm1, %xmm0
+; SSE2-NEXT: retq
+;
+; SSE3-LABEL: @shuffle_v4i32_6701
+; SSE3: # BB#0:
+; SSE3-NEXT: shufpd {{.*}} # xmm1 = xmm1[1],xmm0[0]
+; SSE3-NEXT: movapd %xmm1, %xmm0
+; SSE3-NEXT: retq
+;
+; SSSE3-LABEL: @shuffle_v4i32_6701
+; SSSE3: # BB#0:
+; SSSE3-NEXT: palignr $8, {{.*}} # xmm0 = xmm1[8,9,10,11,12,13,14,15],xmm0[0,1,2,3,4,5,6,7]
+; SSSE3-NEXT: retq
+;
+; SSE41-LABEL: @shuffle_v4i32_6701
+; SSE41: # BB#0:
+; SSE41-NEXT: palignr $8, {{.*}} # xmm0 = xmm1[8,9,10,11,12,13,14,15],xmm0[0,1,2,3,4,5,6,7]
+; SSE41-NEXT: retq
+;
+; AVX1-LABEL: @shuffle_v4i32_6701
+; AVX1: # BB#0:
+; AVX1-NEXT: vpalignr $8, {{.*}} # xmm0 = xmm1[8,9,10,11,12,13,14,15],xmm0[0,1,2,3,4,5,6,7]
+; AVX1-NEXT: retq
+ %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 6, i32 7, i32 0, i32 1>
+ ret <4 x i32> %shuffle
+}
+
+define <4 x i32> @shuffle_v4i32_5670(<4 x i32> %a, <4 x i32> %b) {
+; SSE2-LABEL: @shuffle_v4i32_5670
+; SSE2: # BB#0:
+; SSE2-NEXT: shufps {{.*}} # xmm0 = xmm0[0,0],xmm1[3,0]
+; SSE2-NEXT: shufps {{.*}} # xmm1 = xmm1[1,2],xmm0[2,0]
+; SSE2-NEXT: movaps %xmm1, %xmm0
+; SSE2-NEXT: retq
+;
+; SSE3-LABEL: @shuffle_v4i32_5670
+; SSE3: # BB#0:
+; SSE3-NEXT: shufps {{.*}} # xmm0 = xmm0[0,0],xmm1[3,0]
+; SSE3-NEXT: shufps {{.*}} # xmm1 = xmm1[1,2],xmm0[2,0]
+; SSE3-NEXT: movaps %xmm1, %xmm0
+; SSE3-NEXT: retq
+;
+; SSSE3-LABEL: @shuffle_v4i32_5670
+; SSSE3: # BB#0:
+; SSSE3-NEXT: palignr $4, {{.*}} # xmm0 = xmm1[4,5,6,7,8,9,10,11,12,13,14,15],xmm0[0,1,2,3]
+; SSSE3-NEXT: retq
+;
+; SSE41-LABEL: @shuffle_v4i32_5670
+; SSE41: # BB#0:
+; SSE41-NEXT: palignr $4, {{.*}} # xmm0 = xmm1[4,5,6,7,8,9,10,11,12,13,14,15],xmm0[0,1,2,3]
+; SSE41-NEXT: retq
+;
+; AVX1-LABEL: @shuffle_v4i32_5670
+; AVX1: # BB#0:
+; AVX1-NEXT: vpalignr $4, {{.*}} # xmm0 = xmm1[4,5,6,7,8,9,10,11,12,13,14,15],xmm0[0,1,2,3]
+; AVX1-NEXT: retq
+ %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 5, i32 6, i32 7, i32 0>
+ ret <4 x i32> %shuffle
+}
+
+define <4 x i32> @shuffle_v4i32_1234(<4 x i32> %a, <4 x i32> %b) {
+; SSE2-LABEL: @shuffle_v4i32_1234
+; SSE2: # BB#0:
+; SSE2-NEXT: shufps {{.*}} # xmm1 = xmm1[0,0],xmm0[3,0]
+; SSE2-NEXT: shufps {{.*}} # xmm0 = xmm0[1,2],xmm1[2,0]
+; SSE2-NEXT: retq
+;
+; SSE3-LABEL: @shuffle_v4i32_1234
+; SSE3: # BB#0:
+; SSE3-NEXT: shufps {{.*}} # xmm1 = xmm1[0,0],xmm0[3,0]
+; SSE3-NEXT: shufps {{.*}} # xmm0 = xmm0[1,2],xmm1[2,0]
+; SSE3-NEXT: retq
+;
+; SSSE3-LABEL: @shuffle_v4i32_1234
+; SSSE3: # BB#0:
+; SSSE3-NEXT: palignr $4, {{.*}} # xmm1 = xmm0[4,5,6,7,8,9,10,11,12,13,14,15],xmm1[0,1,2,3]
+; SSSE3-NEXT: movdqa %xmm1, %xmm0
+; SSSE3-NEXT: retq
+;
+; SSE41-LABEL: @shuffle_v4i32_1234
+; SSE41: # BB#0:
+; SSE41-NEXT: palignr $4, {{.*}} # xmm1 = xmm0[4,5,6,7,8,9,10,11,12,13,14,15],xmm1[0,1,2,3]
+; SSE41-NEXT: movdqa %xmm1, %xmm0
+; SSE41-NEXT: retq
+;
+; AVX1-LABEL: @shuffle_v4i32_1234
+; AVX1: # BB#0:
+; AVX1-NEXT: vpalignr $4, {{.*}} # xmm0 = xmm0[4,5,6,7,8,9,10,11,12,13,14,15],xmm1[0,1,2,3]
+; AVX1-NEXT: retq
+ %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 1, i32 2, i32 3, i32 4>
+ ret <4 x i32> %shuffle
+}
+
+define <4 x i32> @shuffle_v4i32_2345(<4 x i32> %a, <4 x i32> %b) {
+; SSE2-LABEL: @shuffle_v4i32_2345
+; SSE2: # BB#0:
+; SSE2-NEXT: shufpd {{.*}} # xmm0 = xmm0[1],xmm1[0]
+; SSE2-NEXT: retq
+;
+; SSE3-LABEL: @shuffle_v4i32_2345
+; SSE3: # BB#0:
+; SSE3-NEXT: shufpd {{.*}} # xmm0 = xmm0[1],xmm1[0]
+; SSE3-NEXT: retq
+;
+; SSSE3-LABEL: @shuffle_v4i32_2345
+; SSSE3: # BB#0:
+; SSSE3-NEXT: palignr $8, {{.*}} # xmm1 = xmm0[8,9,10,11,12,13,14,15],xmm1[0,1,2,3,4,5,6,7]
+; SSSE3-NEXT: movdqa %xmm1, %xmm0
+; SSSE3-NEXT: retq
+;
+; SSE41-LABEL: @shuffle_v4i32_2345
+; SSE41: # BB#0:
+; SSE41-NEXT: palignr $8, {{.*}} # xmm1 = xmm0[8,9,10,11,12,13,14,15],xmm1[0,1,2,3,4,5,6,7]
+; SSE41-NEXT: movdqa %xmm1, %xmm0
+; SSE41-NEXT: retq
+;
+; AVX1-LABEL: @shuffle_v4i32_2345
+; AVX1: # BB#0:
+; AVX1-NEXT: vpalignr $8, {{.*}} # xmm0 = xmm0[8,9,10,11,12,13,14,15],xmm1[0,1,2,3,4,5,6,7]
+; AVX1-NEXT: retq
+ %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 2, i32 3, i32 4, i32 5>
+ ret <4 x i32> %shuffle
+}
+
+define <4 x i32> @shuffle_v4i32_3456(<4 x i32> %a, <4 x i32> %b) {
+; SSE2-LABEL: @shuffle_v4i32_3456
+; SSE2: # BB#0:
+; SSE2-NEXT: shufps {{.*}} # xmm0 = xmm0[3,0],xmm1[0,0]
+; SSE2-NEXT: shufps {{.*}} # xmm0 = xmm0[0,2],xmm1[1,2]
+; SSE2-NEXT: retq
+;
+; SSE3-LABEL: @shuffle_v4i32_3456
+; SSE3: # BB#0:
+; SSE3-NEXT: shufps {{.*}} # xmm0 = xmm0[3,0],xmm1[0,0]
+; SSE3-NEXT: shufps {{.*}} # xmm0 = xmm0[0,2],xmm1[1,2]
+; SSE3-NEXT: retq
+;
+; SSSE3-LABEL: @shuffle_v4i32_3456
+; SSSE3: # BB#0:
+; SSSE3-NEXT: palignr $12, {{.*}} # xmm1 = xmm0[12,13,14,15],xmm1[0,1,2,3,4,5,6,7,8,9,10,11]
+; SSSE3-NEXT: movdqa %xmm1, %xmm0
+; SSSE3-NEXT: retq
+;
+; SSE41-LABEL: @shuffle_v4i32_3456
+; SSE41: # BB#0:
+; SSE41-NEXT: palignr $12, {{.*}} # xmm1 = xmm0[12,13,14,15],xmm1[0,1,2,3,4,5,6,7,8,9,10,11]
+; SSE41-NEXT: movdqa %xmm1, %xmm0
+; SSE41-NEXT: retq
+;
+; AVX1-LABEL: @shuffle_v4i32_3456
+; AVX1: # BB#0:
+; AVX1-NEXT: vpalignr $12, {{.*}} # xmm0 = xmm0[12,13,14,15],xmm1[0,1,2,3,4,5,6,7,8,9,10,11]
+; AVX1-NEXT: retq
+ %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 3, i32 4, i32 5, i32 6>
+ ret <4 x i32> %shuffle
+}
+
+define <4 x i32> @shuffle_v4i32_0u1u(<4 x i32> %a, <4 x i32> %b) {
+; ALL-LABEL: @shuffle_v4i32_0u1u
+; ALL: # BB#0:
+; ALL-NEXT: pshufd {{.*}} # xmm0 = xmm0[0,0,1,1]
+; ALL-NEXT: retq
+ %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 undef, i32 1, i32 undef>
+ ret <4 x i32> %shuffle
+}
+
+define <4 x i32> @shuffle_v4i32_0z1z(<4 x i32> %a) {
+; SSE2-LABEL: @shuffle_v4i32_0z1z
+; SSE2: # BB#0:
+; SSE2-NEXT: xorps %[[X:xmm[0-9]+]], %[[X]]
+; SSE2-NEXT: shufps {{.*}} # xmm0 = xmm0[0,1],[[X]][1,3]
+; SSE2-NEXT: shufps {{.*}} # xmm0 = xmm0[0,2,1,3]
+; SSE2-NEXT: retq
+;
+; SSE3-LABEL: @shuffle_v4i32_0z1z
+; SSE3: # BB#0:
+; SSE3-NEXT: xorps %[[X:xmm[0-9]+]], %[[X]]
+; SSE3-NEXT: shufps {{.*}} # xmm0 = xmm0[0,1],[[X]][1,3]
+; SSE3-NEXT: shufps {{.*}} # xmm0 = xmm0[0,2,1,3]
+; SSE3-NEXT: retq
+;
+; SSSE3-LABEL: @shuffle_v4i32_0z1z
+; SSSE3: # BB#0:
+; SSSE3-NEXT: xorps %[[X:xmm[0-9]+]], %[[X]]
+; SSSE3-NEXT: shufps {{.*}} # xmm0 = xmm0[0,1],[[X]][1,3]
+; SSSE3-NEXT: shufps {{.*}} # xmm0 = xmm0[0,2,1,3]
+; SSSE3-NEXT: retq
+;
+; SSE41-LABEL: @shuffle_v4i32_0z1z
+; SSE41: # BB#0:
+; SSE41-NEXT: pmovzxdq %xmm0, %xmm0
+; SSE41-NEXT: retq
+;
+; AVX1-LABEL: @shuffle_v4i32_0z1z
+; AVX1: # BB#0:
+; AVX1-NEXT: vpmovzxdq %xmm0, %xmm0
+; AVX1-NEXT: retq
+ %shuffle = shufflevector <4 x i32> %a, <4 x i32> zeroinitializer, <4 x i32> <i32 0, i32 5, i32 1, i32 7>
+ ret <4 x i32> %shuffle
+}