Enable all Hexagon tests.

[oota-llvm.git] / test / CodeGen / X86 / widen_arith-4.ll

diff --git a/test/CodeGen/X86/widen_arith-4.ll b/test/CodeGen/X86/widen_arith-4.ll
index 8ffbba656d201474fde110c0f822ac965b34c812..5931d639f19bd043f417a4ca29546e44ad8fe435 100644 (file)
--- a/test/CodeGen/X86/widen_arith-4.ll
+++ b/test/CodeGen/X86/widen_arith-4.ll
@@ -1,11 +1,9 @@
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse42 -disable-mmx -o %t
-; RUN: grep psubw  %t | count 1
-; RUN: grep pmullw %t | count 1
+; RUN: llc < %s -march=x86-64 -mattr=+sse42 | FileCheck %s
+; CHECK: psubw
+; CHECK-NEXT: pmullw
 
 ; Widen a v5i16 to v8i16 to do a vector sub and multiple
 
-target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
-
 define void @update(<5 x i16>* %dst, <5 x i16>* %src, i32 %n) nounwind {
 entry:
        %dst.addr = alloca <5 x i16>*           ; <<5 x i16>**> [#uses=2]