CodeGen peephole: fold redundant phys reg copies

[oota-llvm.git] / test / CodeGen / X86 / widen_load-0.ll

diff --git a/test/CodeGen/X86/widen_load-0.ll b/test/CodeGen/X86/widen_load-0.ll
index 0d21b49ad77ae3ec80d4458fbaae014534deb71c..edaaa77c14568e3543e93e0ac98c02bab0c883a1 100644 (file)
--- a/test/CodeGen/X86/widen_load-0.ll
+++ b/test/CodeGen/X86/widen_load-0.ll
@@ -1,23 +1,17 @@
 ; RUN: llc < %s -o - -mtriple=x86_64-linux | FileCheck %s
-; RUN: llc < %s -o - -mtriple=x86_64-win32 | FileCheck %s -check-prefix=WIN64
 ; PR4891
 
 ; Both loads should happen before either store.
 
-; CHECK: movd  (%rsi), {{.*}}
-; CHECK: movd  (%rdi), {{.*}}
-; CHECK: movd  {{.*}}, (%rdi)
-; CHECK: movd  {{.*}}, (%rsi)
-
-; WIN64: movd  (%rdx), {{.*}}
-; WIN64: movd  (%rcx), {{.*}}
-; WIN64: movd  {{.*}}, (%rcx)
-; WIN64: movd  {{.*}}, (%rdx)
+; CHECK: movl  ({{.*}}), {{.*}}
+; CHECK: movl  ({{.*}}), {{.*}}
+; CHECK: movl  {{.*}}, ({{.*}})
+; CHECK: movl  {{.*}}, ({{.*}})
 
 define void @short2_int_swap(<2 x i16>* nocapture %b, i32* nocapture %c) nounwind {
 entry:
-  %0 = load <2 x i16>* %b, align 2                ; <<2 x i16>> [#uses=1]
-  %1 = load i32* %c, align 4                      ; <i32> [#uses=1]
+  %0 = load <2 x i16>, <2 x i16>* %b, align 2                ; <<2 x i16>> [#uses=1]
+  %1 = load i32, i32* %c, align 4                      ; <i32> [#uses=1]
   %tmp1 = bitcast i32 %1 to <2 x i16>             ; <<2 x i16>> [#uses=1]
   store <2 x i16> %tmp1, <2 x i16>* %b, align 2
   %tmp5 = bitcast <2 x i16> %0 to <1 x i32>       ; <<1 x i32>> [#uses=1]