; RUN: llc < %s -march=x86 -mattr=+sse2 | FileCheck %s -check-prefix=X32
-; RUN: llc < %s -march=x86-64 | FileCheck %s -check-prefix=X64
+; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s -check-prefix=X64
+; RUN: llc < %s -mtriple=x86_64-win32 | FileCheck %s -check-prefix=X64
; Though it is undefined, we want xor undef,undef to produce zero.
define <4 x i32> @test1() nounwind {
ret <4 x i32> %tmp
; X32: test1:
-; X32: xorps %xmm0, %xmm0
+; X32: pxor %xmm0, %xmm0
; X32: ret
}
ret i32 %tmp4
; X64: test3:
-; X64: notl %esi
-; X64: andl %edi, %esi
-; X64: movl %esi, %eax
+; X64: notl
+; X64: andl
; X64: shrl %eax
; X64: ret
ret i32 %tmp3
; X64: test4:
-; X64: notl %eax
-; X64: andl {{.*}}%eax
+; X64: notl [[REG:%[a-z]+]]
+; X64: andl {{.*}}[[REG]]
; X32: test4:
-; X32: notl %edx
-; X32: andl {{.*}}%edx
+; X32: notl [[REG:%[a-z]+]]
+; X32: andl {{.*}}[[REG]]
}
define i16 @test5(i16 %a, i16 %b) nounwind {
bb12:
ret i16 %tmp3
; X64: test5:
-; X64: notw %ax
-; X64: andw {{.*}}%ax
+; X64: notl [[REG:%[a-z]+]]
+; X64: andl {{.*}}[[REG]]
; X32: test5:
-; X32: notw %dx
-; X32: andw {{.*}}%dx
+; X32: notl [[REG:%[a-z]+]]
+; X32: andl {{.*}}[[REG]]
}
define i8 @test6(i8 %a, i8 %b) nounwind {
bb12:
ret i8 %tmp3
; X64: test6:
-; X64: notb %al
-; X64: andb {{.*}}%al
+; X64: notb [[REG:%[a-z]+]]
+; X64: andb {{.*}}[[REG]]
; X32: test6:
-; X32: notb %dl
-; X32: andb {{.*}}%dl
+; X32: notb [[REG:%[a-z]+]]
+; X32: andb {{.*}}[[REG]]
}
define i32 @test7(i32 %a, i32 %b) nounwind {
bb12:
ret i32 %tmp3
; X64: test7:
-; X64: xorl $2147483646, %eax
-; X64: andl {{.*}}%eax
+; X64: xorl $2147483646, [[REG:%[a-z]+]]
+; X64: andl {{.*}}[[REG]]
; X32: test7:
-; X32: xorl $2147483646, %edx
-; X32: andl {{.*}}%edx
+; X32: xorl $2147483646, [[REG:%[a-z]+]]
+; X32: andl {{.*}}[[REG]]
}
+define i32 @test8(i32 %a) nounwind {
+; rdar://7553032
+entry:
+ %t1 = sub i32 0, %a
+ %t2 = add i32 %t1, -1
+ ret i32 %t2
+; X64: test8:
+; X64: notl {{%eax|%edi|%ecx}}
+; X32: test8:
+; X32: notl %eax
+}