When checking for sret-demotion, it needs to use legal types. When using the return...

[oota-llvm.git] / test / CodeGen / X86 / xor.ll

diff --git a/test/CodeGen/X86/xor.ll b/test/CodeGen/X86/xor.ll
index 86ecbe5ec7eb99516bb9818954afd15587154360..7bd06bba4c3e43c1453f88324d31285b4547011d 100644 (file)
--- a/test/CodeGen/X86/xor.ll
+++ b/test/CodeGen/X86/xor.ll
@@ -58,11 +58,11 @@ bb12:
        ret i32 %tmp3
         
 ; X64: test4:
-; X64:    notl %eax
-; X64:    andl {{.*%eax}}
+; X64:    notl [[REG:%[a-z]+]]
+; X64:    andl {{.*}}[[REG]]
 ; X32: test4:
-; X32:    notl %edx
-; X32:    andl {{.*%edx}}
+; X32:    notl [[REG:%[a-z]+]]
+; X32:    andl {{.*}}[[REG]]
 }
 
 define i16 @test5(i16 %a, i16 %b) nounwind  {
@@ -80,11 +80,11 @@ bb:
 bb12:
        ret i16 %tmp3
 ; X64: test5:
-; X64:    notw %ax
-; X64:    andw {{.*%ax}}
+; X64:    notw [[REG:%[a-z]+]]
+; X64:    andw {{.*}}[[REG]]
 ; X32: test5:
-; X32:    notw %dx
-; X32:    andw {{.*%dx}}
+; X32:    notw [[REG:%[a-z]+]]
+; X32:    andw {{.*}}[[REG]]
 }
 
 define i8 @test6(i8 %a, i8 %b) nounwind  {
@@ -102,11 +102,11 @@ bb:
 bb12:
        ret i8 %tmp3
 ; X64: test6:
-; X64:    notb %al
-; X64:    andb {{.*%al}}
+; X64:    notb [[REG:%[a-z]+]]
+; X64:    andb {{.*}}[[REG]]
 ; X32: test6:
-; X32:    notb %dl
-; X32:    andb {{.*%dl}}
+; X32:    notb [[REG:%[a-z]+]]
+; X32:    andb {{.*}}[[REG]]
 }
 
 define i32 @test7(i32 %a, i32 %b) nounwind  {
@@ -124,10 +124,10 @@ bb:
 bb12:
        ret i32 %tmp3
 ; X64: test7:
-; X64:    xorl $2147483646, %eax
-; X64:    andl {{.*%eax}}
+; X64:    xorl $2147483646, [[REG:%[a-z]+]]
+; X64:    andl {{.*}}[[REG]]
 ; X32: test7:
-; X32:    xorl $2147483646, %edx
-; X32:    andl {{.*%edx}}
+; X32:    xorl $2147483646, [[REG:%[a-z]+]]
+; X32:    andl {{.*}}[[REG]]
 }