fix an x86 fast isel issue where we'd completely give up on folding an address

[oota-llvm.git] / test / CodeGen / XCore / mul64.ll

diff --git a/test/CodeGen/XCore/mul64.ll b/test/CodeGen/XCore/mul64.ll
index 329e214d1d23fc0d7841cda1a8ab5b8008c8543e..77c6b42688492a8d2832aff6b50da6ed2da95496 100644 (file)
--- a/test/CodeGen/XCore/mul64.ll
+++ b/test/CodeGen/XCore/mul64.ll
@@ -1,4 +1,5 @@
 ; RUN: llc < %s -march=xcore | FileCheck %s
+; RUN: llc < %s -march=xcore -regalloc=basic | FileCheck %s
 define i64 @umul_lohi(i32 %a, i32 %b) {
 entry:
        %0 = zext i32 %a to i64
@@ -7,8 +8,8 @@ entry:
        ret i64 %2
 }
 ; CHECK: umul_lohi:
-; CHECK: ldc r2, 0
-; CHECK-NEXT: lmul r1, r0, r1, r0, r2, r2
+; CHECK: ldc [[REG:r[0-9]+]], 0
+; CHECK-NEXT: lmul r1, r0, r1, r0, [[REG]], [[REG]]
 ; CHECK-NEXT: retsp 0
 
 define i64 @smul_lohi(i32 %a, i32 %b) {
@@ -19,11 +20,11 @@ entry:
        ret i64 %2
 }
 ; CHECK: smul_lohi:
-; CHECK: ldc r2, 0
-; CHECK-NEXT: mov r3, r2
-; CHECK-NEXT: maccs r2, r3, r1, r0
-; CHECK-NEXT: mov r0, r3
-; CHECK-NEXT: mov r1, r2
+; CHECK: ldc
+; CHECK-NEXT: mov
+; CHECK-NEXT: maccs
+; CHECK-NEXT: mov r0,
+; CHECK-NEXT: mov r1,
 ; CHECK-NEXT: retsp 0
 
 define i64 @mul64(i64 %a, i64 %b) {
@@ -32,8 +33,21 @@ entry:
        ret i64 %0
 }
 ; CHECK: mul64:
-; CHECK: ldc r11, 0
-; CHECK-NEXT: lmul r11, r4, r0, r2, r11, r11
-; CHECK-NEXT: mul r0, r0, r3
-; CHECK-NEXT: lmul r0, r1, r1, r2, r11, r0
-; CHECK-NEXT: mov r0, r4
+; CHECK: ldc
+; CHECK-NEXT: lmul
+; CHECK-NEXT: mul
+; CHECK-NEXT: lmul
+; CHECK-NEXT: mov r0,
+
+define i64 @mul64_2(i64 %a, i32 %b) {
+entry:
+       %0 = zext i32 %b to i64
+       %1 = mul i64 %a, %0
+       ret i64 %1
+}
+; CHECK: mul64_2:
+; CHECK: ldc
+; CHECK-NEXT: lmul
+; CHECK-NEXT: mul
+; CHECK-NEXT: add r1,
+; CHECK-NEXT: retsp 0