This patch implements parsing of mips FCC register operands. The example instructions...

[oota-llvm.git] / test / ExecutionEngine / test-loadstore.ll

diff --git a/test/ExecutionEngine/test-loadstore.ll b/test/ExecutionEngine/test-loadstore.ll
index ba0f0baf8d6df7d47f768e866e96f0d7e16d4804..75743146c6eb89c0d7b860af1958a62788982dcf 100644 (file)
--- a/test/ExecutionEngine/test-loadstore.ll
+++ b/test/ExecutionEngine/test-loadstore.ll
@@ -1,5 +1,5 @@
-; RUN: llvm-as %s -o %t.bc
-; RUN: lli %t.bc > /dev/null
+; RUN: %lli %s > /dev/null
+; XFAIL: arm
 
 define void @test(i8* %P, i16* %P.upgrd.1, i32* %P.upgrd.2, i64* %P.upgrd.3) {
        %V = load i8* %P                ; <i8> [#uses=1]