Handle ARM inline asm "w" constraints with 64-bit ("d") registers.

[oota-llvm.git] / test / ExecutionEngine / test-loadstore.ll

diff --git a/test/ExecutionEngine/test-loadstore.ll b/test/ExecutionEngine/test-loadstore.ll
index 298ea96fd72814bab2b53d12e6ae96f507ad0c4f..ba0f0baf8d6df7d47f768e866e96f0d7e16d4804 100644 (file)
--- a/test/ExecutionEngine/test-loadstore.ll
+++ b/test/ExecutionEngine/test-loadstore.ll
@@ -1,4 +1,4 @@
-; RUN: llvm-as %s -f -o %t.bc
+; RUN: llvm-as %s -o %t.bc
 ; RUN: lli %t.bc > /dev/null
 
 define void @test(i8* %P, i16* %P.upgrd.1, i32* %P.upgrd.2, i64* %P.upgrd.3) {