Fix PR4865. This syncs up the JIT's DWARF emitter with what's in the

[oota-llvm.git] / test / ExecutionEngine / test-shift.ll

diff --git a/test/ExecutionEngine/test-shift.ll b/test/ExecutionEngine/test-shift.ll
index a3156e9a50e531dec4b2ea05ec4f790ff63af458..2791b8534a58513935f1645e9f61df9b4ddc34c7 100644 (file)
--- a/test/ExecutionEngine/test-shift.ll
+++ b/test/ExecutionEngine/test-shift.ll
@@ -1,27 +1,33 @@
-; test shifts
-void %main() {
-    %i = add int 10, 0
-    %u = add uint 20, 0
-    %shamt = add ubyte 0, 0
-    %shamt2 = add ubyte 1, 0
-    %shamt3 = add ubyte 2, 0
-    %shamt4 = add ubyte 3, 0
-    ; constantShiftAmount  isRightShift   isOperandUnsigned
-    ;  0                     0               0
-    %temp01 = shl int %i, ubyte %shamt
-    ;  0                     0               1
-    %temp02 = shl uint %u, ubyte %shamt2
-    ;  0                     1               0
-    %temp03 = shr int %i, ubyte %shamt3
-    ;  0                     1               1
-    %temp04 = shr uint %u, ubyte %shamt4
-    ;  1                     0               0
-    %temp05 = shl int %i, ubyte 4
-    ;  1                     0               1
-    %temp06 = shl uint %u, ubyte 5
-    ;  1                     1               0
-    %temp07 = shr int %i, ubyte 6
-    ;  1                     1               1
-    %temp08 = shr uint %u, ubyte 7
-    ret void
+; RUN: llvm-as %s -o %t.bc
+; RUN: lli %t.bc > /dev/null
+
+define i32 @main() {
+       %shamt = add i8 0, 1            ; <i8> [#uses=8]
+       %shift.upgrd.1 = zext i8 %shamt to i32          ; <i32> [#uses=1]
+       %t1.s = shl i32 1, %shift.upgrd.1               ; <i32> [#uses=0]
+       %t2.s = shl i32 1, 4            ; <i32> [#uses=0]
+       %shift.upgrd.2 = zext i8 %shamt to i32          ; <i32> [#uses=1]
+       %t1 = shl i32 1, %shift.upgrd.2         ; <i32> [#uses=0]
+       %t2 = shl i32 1, 5              ; <i32> [#uses=0]
+       %t2.s.upgrd.3 = shl i64 1, 4            ; <i64> [#uses=0]
+       %t2.upgrd.4 = shl i64 1, 5              ; <i64> [#uses=0]
+       %shift.upgrd.5 = zext i8 %shamt to i32          ; <i32> [#uses=1]
+       %tr1.s = ashr i32 1, %shift.upgrd.5             ; <i32> [#uses=0]
+       %tr2.s = ashr i32 1, 4          ; <i32> [#uses=0]
+       %shift.upgrd.6 = zext i8 %shamt to i32          ; <i32> [#uses=1]
+       %tr1 = lshr i32 1, %shift.upgrd.6               ; <i32> [#uses=0]
+       %tr2 = lshr i32 1, 5            ; <i32> [#uses=0]
+       %tr1.l = ashr i64 1, 4          ; <i64> [#uses=0]
+       %shift.upgrd.7 = zext i8 %shamt to i64          ; <i64> [#uses=1]
+       %tr2.l = ashr i64 1, %shift.upgrd.7             ; <i64> [#uses=0]
+       %tr3.l = shl i64 1, 4           ; <i64> [#uses=0]
+       %shift.upgrd.8 = zext i8 %shamt to i64          ; <i64> [#uses=1]
+       %tr4.l = shl i64 1, %shift.upgrd.8              ; <i64> [#uses=0]
+       %tr1.u = lshr i64 1, 5          ; <i64> [#uses=0]
+       %shift.upgrd.9 = zext i8 %shamt to i64          ; <i64> [#uses=1]
+       %tr2.u = lshr i64 1, %shift.upgrd.9             ; <i64> [#uses=0]
+       %tr3.u = shl i64 1, 5           ; <i64> [#uses=0]
+       %shift.upgrd.10 = zext i8 %shamt to i64         ; <i64> [#uses=1]
+       %tr4.u = shl i64 1, %shift.upgrd.10             ; <i64> [#uses=0]
+       ret i32 0
 }