Write sections mostly in one pass.

[oota-llvm.git] / test / MC / ARM / arm_instructions.s

diff --git a/test/MC/ARM/arm_instructions.s b/test/MC/ARM/arm_instructions.s
index 87f061165f696081c2c02f87b7e4abff510ad58f..a4c100ee68f90923853c0fe6e836b60f1ad513d9 100644 (file)
--- a/test/MC/ARM/arm_instructions.s
+++ b/test/MC/ARM/arm_instructions.s
@@ -1,7 +1,14 @@
-@ RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unknown -show-encoding %s | FileCheck %s
-
-@ CHECK: trap
-@ CHECK: encoding: [0xfe,0xde,0xff,0xe7]
+@ RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unknown -show-encoding %s \
+@ RUN:  | FileCheck %s -check-prefix=ALL
+@ RUN: llvm-mc -mcpu=cortex-a9 -triple armv7-unknown-nacl -show-encoding %s \
+@ RUN:  | FileCheck %s -check-prefix=NACL
+@ RUN: llvm-mc -mcpu=cortex-a8 -mattr=+nacl-trap -triple armv7 -show-encoding %s \
+@ RUN:  | FileCheck %s -check-prefix=NACL
+
+@ ALL: trap
+@ ALL: encoding: [0xfe,0xde,0xff,0xe7]
+@ NACL: trap
+@ NACL: encoding: [0xf0,0xde,0xfe,0xe7]
         trap
 
 @ CHECK: bx    lr
@@ -39,15 +46,6 @@
 @ CHECK: adc   r1, r2, r3 @ encoding: [0x03,0x10,0xa2,0xe0]
         adc r1,r2,r3
 
-@ CHECK: sbc   r1, r2, r3 @ encoding: [0x03,0x10,0xc2,0xe0]
-        sbc r1,r2,r3
-
-@ CHECK: orr   r1, r2, r3 @ encoding: [0x03,0x10,0x82,0xe1]
-        orr r1,r2,r3
-
-@ CHECK: orrs  r1, r2, r3 @ encoding: [0x03,0x10,0x92,0xe1]
-        orrs r1,r2,r3
-
 @ CHECK: bic   r1, r2, r3 @ encoding: [0x03,0x10,0xc2,0xe1]
         bic r1,r2,r3
 
@@ -63,12 +61,6 @@
 @ CHECK: mvns  r1, r2 @ encoding: [0x02,0x10,0xf0,0xe1]
         mvns r1,r2
 
-@ CHECK: rsb   r1, r2, r3 @ encoding: [0x03,0x10,0x62,0xe0]
-        rsb r1,r2,r3
-
-@ CHECK: rsc   r1, r2, r3 @ encoding: [0x03,0x10,0xe2,0xe0]
-        rsc r1,r2,r3
-
 @ CHECK: bfi  r0, r0, #5, #7 @ encoding: [0x90,0x02,0xcb,0xe7]
         bfi  r0, r0, #5, #7
 
@@ -80,63 +72,15 @@
 @ CHECK: cdp2  p7, #1, c1, c1, c1, #4 @ encoding: [0x81,0x17,0x11,0xfe]
         cdp2  p7, #1, c1, c1, c1, #4
 
-@ CHECK: qadd  r1, r2, r3 @ encoding: [0x52,0x10,0x03,0xe1]
-        qadd  r1, r2, r3
-
-@ CHECK: qsub  r1, r2, r3 @ encoding: [0x52,0x10,0x23,0xe1]
-        qsub  r1, r2, r3
-
-@ CHECK: qdadd  r1, r2, r3 @ encoding: [0x52,0x10,0x43,0xe1]
-        qdadd  r1, r2, r3
-
-@ CHECK: qdsub  r1, r2, r3 @ encoding: [0x52,0x10,0x63,0xe1]
-        qdsub  r1, r2, r3
-
-@ CHECK: wfe @ encoding: [0x02,0xf0,0x20,0xe3]
-        wfe
-
-@ CHECK: wfi @ encoding: [0x03,0xf0,0x20,0xe3]
-        wfi
-
-@ CHECK: yield @ encoding: [0x01,0xf0,0x20,0xe3]
-        yield
-
-@ CHECK: cpsie  aif @ encoding: [0xc0,0x01,0x08,0xf1]
-        cpsie  aif
-
-@ CHECK: cps  #15 @ encoding: [0x0f,0x00,0x02,0xf1]
-        cps  #15
-
-@ CHECK: cpsie  if, #10 @ encoding: [0xca,0x00,0x0a,0xf1]
-        cpsie  if, #10
-
 @ CHECK: add   r1, r2, r3, lsl r4      @ encoding: [0x13,0x14,0x82,0xe0]
   add r1, r2, r3, lsl r4
 
-@ CHECK: strexb  r0, r1, [r2] @ encoding: [0x91,0x0f,0xc2,0xe1]
-        strexb  r0, r1, [r2]
-
-@ CHECK: strexh  r0, r1, [r2] @ encoding: [0x91,0x0f,0xe2,0xe1]
-        strexh  r0, r1, [r2]
-
-@ CHECK: strex  r0, r1, [r2] @ encoding: [0x91,0x0f,0x82,0xe1]
-        strex  r0, r1, [r2]
-
-@ CHECK: strexd  r0, r2, r3, [r1] @ encoding: [0x92,0x0f,0xa1,0xe1]
-        strexd  r0, r2, r3, [r1]
-
-@ CHECK: ldrexb  r0, [r0] @ encoding: [0x9f,0x0f,0xd0,0xe1]
-        ldrexb  r0, [r0]
-
-@ CHECK: ldrexh  r0, [r0] @ encoding: [0x9f,0x0f,0xf0,0xe1]
-        ldrexh  r0, [r0]
-
-@ CHECK: ldrex  r0, [r0] @ encoding: [0x9f,0x0f,0x90,0xe1]
-        ldrex  r0, [r0]
-
-@ CHECK: ldrexd  r0, r1, [r0] @ encoding: [0x9f,0x0f,0xb0,0xe1]
-        ldrexd  r0, r1, [r0]
-
 @ CHECK: ssat16  r0, #7, r0 @ encoding: [0x30,0x0f,0xa6,0xe6]
         ssat16  r0, #7, r0
 
+@ CHECK: cpsie none, #0                @ encoding: [0x00,0x00,0x0a,0xf1]
+        cpsie none, #0
+
+@ CHECK: strh r3, [r2, #-0]            @ encoding: [0xb0,0x30,0x42,0xe1]
+        strh r3, [r2, #-0]
+