ARM: Prevent ARMAsmParser::shouldOmitCCOutOperand() from misidentifying certain Thumb...
[oota-llvm.git] / test / MC / ARM / basic-thumb-instructions.s
index 94ba83928a3bfda93b9e74f3efaad013d6842da2..b48db9a4d8e463534a7e77557242aabf2bf186cd 100644 (file)
@@ -1,4 +1,9 @@
+@---
+@ Run these test in both Thumb1 and Thumb2 modes, as all of the encodings
+@ should be valid, and parse the same, in both.
+@---
 @ RUN: llvm-mc -triple=thumbv6-apple-darwin -show-encoding < %s | FileCheck %s
+@ RUN: llvm-mc -triple=thumbv7-apple-darwin -show-encoding < %s | FileCheck %s
   .syntax unified
   .globl _func
 
@@ -54,12 +59,16 @@ _func:
         add sp, sp, #4
         add r2, sp, #8
         add r2, sp, #1020
+       add sp, sp, #-8
+       add sp, #-8
 
 @ CHECK: add   sp, #4                  @ encoding: [0x01,0xb0]
 @ CHECK: add   sp, #508                @ encoding: [0x7f,0xb0]
 @ CHECK: add   sp, #4                  @ encoding: [0x01,0xb0]
 @ CHECK: add   r2, sp, #8              @ encoding: [0x02,0xaa]
 @ CHECK: add   r2, sp, #1020           @ encoding: [0xff,0xaa]
+@ CHECK: sub   sp, #8                  @ encoding: [0x82,0xb0]
+@ CHECK: sub   sp, #8                  @ encoding: [0x82,0xb0]
 
 
 @------------------------------------------------------------------------------
@@ -76,11 +85,15 @@ _func:
 @ ADR
 @------------------------------------------------------------------------------
         adr r2, _baz
-        adr    r2, #3
+        adr r5, #0
+        adr r2, #4
+        adr r3, #1020
 
 @ CHECK: adr   r2, _baz                @ encoding: [A,0xa2]
             @   fixup A - offset: 0, value: _baz, kind: fixup_thumb_adr_pcrel_10
-@ CHECK: adr   r2, #3                  @ encoding: [0x03,0xa2]
+@ CHECK: adr   r5, #0                  @ encoding: [0x00,0xa5]
+@ CHECK: adr   r2, #4                  @ encoding: [0x01,0xa2]
+@ CHECK: adr   r3, #1020               @ encoding: [0xff,0xa3]
 
 @------------------------------------------------------------------------------
 @ ASR (immediate)
@@ -88,10 +101,16 @@ _func:
         asrs r2, r3, #32
         asrs r2, r3, #5
         asrs r2, r3, #1
+        asrs r5, #21
+        asrs r5, r5, #21
+        asrs r3, r5, #21
 
 @ CHECK: asrs  r2, r3, #32             @ encoding: [0x1a,0x10]
 @ CHECK: asrs  r2, r3, #5              @ encoding: [0x5a,0x11]
 @ CHECK: asrs  r2, r3, #1              @ encoding: [0x5a,0x10]
+@ CHECK: asrs  r5, r5, #21             @ encoding: [0x6d,0x15]
+@ CHECK: asrs  r5, r5, #21             @ encoding: [0x6d,0x15]
+@ CHECK: asrs  r3, r5, #21             @ encoding: [0x6b,0x15]
 
 
 @------------------------------------------------------------------------------
@@ -109,6 +128,8 @@ _func:
         beq _bar
         b       #1838
         b       #-420
+        beq     #336
+        beq     #160
 
 @ CHECK: b     _baz                    @ encoding: [A,0xe0'A']
              @   fixup A - offset: 0, value: _baz, kind: fixup_arm_thumb_br
@@ -116,6 +137,17 @@ _func:
              @   fixup A - offset: 0, value: _bar, kind: fixup_arm_thumb_bcc
 @ CHECK: b       #1838                   @ encoding: [0x97,0xe3]
 @ CHECK: b       #-420                   @ encoding: [0x2e,0xe7]
+@ CHECK: beq     #336                    @ encoding: [0xa8,0xd0]
+@ CHECK: beq     #160                    @ encoding: [0x50,0xd0]
+
+@------------------------------------------------------------------------------
+@ BL/BLX
+@------------------------------------------------------------------------------
+        blx     #884800
+        blx     #1769600
+
+@ CHECK: blx     #884800                 @ encoding: [0xd8,0xf0,0x20,0xe8]
+@ CHECK: blx     #1769600                @ encoding: [0xb0,0xf1,0x40,0xe8]
 
 @------------------------------------------------------------------------------
 @ BICS
@@ -141,9 +173,9 @@ _func:
         bl _bar
         blx _baz
 
-@ CHECK: bl    _bar                    @ encoding: [A,0xf0'A',A,0xf8'A']
+@ CHECK: bl    _bar                    @ encoding: [A,0xf0'A',A,0xd0'A']
              @   fixup A - offset: 0, value: _bar, kind: fixup_arm_thumb_bl
-@ CHECK: blx   _baz                    @ encoding: [A,0xf0'A',A,0xe8'A']
+@ CHECK: blx   _baz                    @ encoding: [A,0xf0'A',A,0xc0'A']
              @   fixup A - offset: 0, value: _baz, kind: fixup_arm_thumb_blx
 
 
@@ -231,8 +263,8 @@ _func:
 
 @ CHECK: ldr   r1, _foo                @ encoding: [A,0x49]
              @   fixup A - offset: 0, value: _foo, kind: fixup_arm_thumb_cp
-@ CHECK: ldr     r3, #604                @ encoding: [0x97,0x4b]
-@ CHECK: ldr     r3, #368                @ encoding: [0x5c,0x4b]
+@ CHECK: ldr     r3, [pc, #604]         @ encoding: [0x97,0x4b]
+@ CHECK: ldr     r3, [pc, #368]         @ encoding: [0x5c,0x4b]
 
 @------------------------------------------------------------------------------
 @ LDR (register)
@@ -297,9 +329,15 @@ _func:
 @------------------------------------------------------------------------------
         lsls r4, r5, #0
         lsls r4, r5, #4
+        lsls r3, #12
+        lsls r3, r3, #12
+        lsls r1, r3, #12
 
 @ CHECK: lsls  r4, r5, #0              @ encoding: [0x2c,0x00]
 @ CHECK: lsls  r4, r5, #4              @ encoding: [0x2c,0x01]
+@ CHECK: lsls  r3, r3, #12             @ encoding: [0x1b,0x03]
+@ CHECK: lsls  r3, r3, #12             @ encoding: [0x1b,0x03]
+@ CHECK: lsls  r1, r3, #12             @ encoding: [0x19,0x03]
 
 
 @------------------------------------------------------------------------------
@@ -315,9 +353,15 @@ _func:
 @------------------------------------------------------------------------------
         lsrs r1, r3, #1
         lsrs r1, r3, #32
+        lsrs r4, #20
+        lsrs r4, r4, #20
+        lsrs r2, r4, #20
 
 @ CHECK: lsrs  r1, r3, #1              @ encoding: [0x59,0x08]
 @ CHECK: lsrs  r1, r3, #32             @ encoding: [0x19,0x08]
+@ CHECK: lsrs  r4, r4, #20             @ encoding: [0x24,0x0d]
+@ CHECK: lsrs  r4, r4, #20             @ encoding: [0x24,0x0d]
+@ CHECK: lsrs  r2, r4, #20             @ encoding: [0x22,0x0d]
 
 
 @------------------------------------------------------------------------------
@@ -354,9 +398,11 @@ _func:
 @ MUL
 @------------------------------------------------------------------------------
         muls r1, r2, r1
+        muls r2, r2, r3
         muls r3, r4
 
 @ CHECK: muls  r1, r2, r1              @ encoding: [0x51,0x43]
+@ CHECK: muls  r2, r3, r2              @ encoding: [0x5a,0x43]
 @ CHECK: muls  r3, r4, r3              @ encoding: [0x63,0x43]
 
 
@@ -375,15 +421,6 @@ _func:
 
 @ CHECK: rsbs  r3, r4, #0              @ encoding: [0x63,0x42]
 
-
-@------------------------------------------------------------------------------
-@ NOP
-@------------------------------------------------------------------------------
-        nop
-
-@ CHECK: nop                            @ encoding: [0xc0,0x46]
-
-
 @------------------------------------------------------------------------------
 @ ORR
 @------------------------------------------------------------------------------
@@ -602,13 +639,3 @@ _func:
 @ CHECK: uxth  r1, r4                  @ encoding: [0xa1,0xb2]
 
 
-@------------------------------------------------------------------------------
-@ WFE/WFI/YIELD
-@------------------------------------------------------------------------------
-        wfe
-        wfi
-        yield
-
-@ CHECK: wfe                             @ encoding: [0x20,0xbf]
-@ CHECK: wfi                             @ encoding: [0x30,0xbf]
-@ CHECK: yield                           @ encoding: [0x10,0xbf]