[mips] Expand JAL instructions when PIC is enabled.

[oota-llvm.git] / test / MC / ARM / mode-switch.s

diff --git a/test/MC/ARM/mode-switch.s b/test/MC/ARM/mode-switch.s
index 1fad8f13b6e5385039494cbfbeb8381b5cc992e2..afcc082ba60d5f29a66f0c47cca2cc31f1ffa809 100644 (file)
--- a/test/MC/ARM/mode-switch.s
+++ b/test/MC/ARM/mode-switch.s
@@ -1,16 +1,26 @@
 @ Test ARM / Thumb mode switching with .code
-@ RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unknown -show-encoding < %s | FileCheck %s
+@ RUN: llvm-mc -triple armv7-unknown-unknown -show-encoding < %s | FileCheck %s
+@ RUN: llvm-mc -triple thumbv7-unknown-unknown -show-encoding <%s | FileCheck %s
 
 .code 16
-
-@ CHECK:       add.w   r0, r0, r1              @ encoding: [0x01,0x00,0x00,0xeb]
        add.w   r0, r0, r1
+@ CHECK: add.w r0, r0, r1              @ encoding: [0x00,0xeb,0x01,0x00]
 
 .code 32
-@ CHECK:       add     r0, r0, r1              @ encoding: [0x01,0x00,0x80,0xe0]
        add     r0, r0, r1
+@ CHECK: add   r0, r0, r1              @ encoding: [0x01,0x00,0x80,0xe0]
 
 .code 16
-@ CHECK:       add     r0, r0, r1              @ encoding: [0x40,0x18]
-        
-        add     r0, r0, r1
+        adds    r0, r0, r1
+@ CHECK: adds  r0, r0, r1              @ encoding: [0x40,0x18]
+
+.arm
+       add     r0, r0, r1
+@ CHECK: add   r0, r0, r1              @ encoding: [0x01,0x00,0x80,0xe0]
+
+.thumb
+       add.w   r0, r0, r1
+        adds    r0, r0, r1
+
+@ CHECK: add.w r0, r0, r1              @ encoding: [0x00,0xeb,0x01,0x00]
+@ CHECK: adds  r0, r0, r1              @ encoding: [0x40,0x18]