[PowerPC] Implement writeNopData
[oota-llvm.git] / test / MC / ARM / neon-shuffle-encoding.s
index b40904c04072b40ad67882ed3b54d1efff47c1f5..0f07d9f9968c2dc2e50ff16196257b3c9b9035de 100644 (file)
@@ -6,6 +6,16 @@
        vext.8  q8, q9, q8, #7
        vext.16 d16, d17, d16, #3
        vext.32 q8, q9, q8, #3
+       vext.64 q8, q9, q8, #1
+
+       vext.8  d17, d16, #3
+       vext.8  d7, d11, #5
+       vext.8  q3, q8, #3
+       vext.8  q9, q4, #7
+       vext.16 d1, d26, #3
+       vext.32 q5, q8, #3
+       vext.64 q5, q8, #1
+
 
 @ CHECK: vext.8        d16, d17, d16, #3       @ encoding: [0xa0,0x03,0xf1,0xf2]
 @ CHECK: vext.8        d16, d17, d16, #5       @ encoding: [0xa0,0x05,0xf1,0xf2]
 @ CHECK: vext.8        q8, q9, q8, #7          @ encoding: [0xe0,0x07,0xf2,0xf2]
 @ CHECK: vext.16 d16, d17, d16, #3      @ encoding: [0xa0,0x06,0xf1,0xf2]
 @ CHECK: vext.32 q8, q9, q8, #3         @ encoding: [0xe0,0x0c,0xf2,0xf2]
+@ CHECK: vext.64 q8, q9, q8, #1         @ encoding: [0xe0,0x08,0xf2,0xf2]
+
+@ CHECK: vext.8        d17, d17, d16, #3       @ encoding: [0xa0,0x13,0xf1,0xf2]
+@ CHECK: vext.8        d7, d7, d11, #5         @ encoding: [0x0b,0x75,0xb7,0xf2]
+@ CHECK: vext.8        q3, q3, q8, #3          @ encoding: [0x60,0x63,0xb6,0xf2]
+@ CHECK: vext.8        q9, q9, q4, #7          @ encoding: [0xc8,0x27,0xf2,0xf2]
+@ CHECK: vext.16 d1, d1, d26, #3        @ encoding: [0x2a,0x16,0xb1,0xf2]
+@ CHECK: vext.32 q5, q5, q8, #3         @ encoding: [0x60,0xac,0xba,0xf2]
+@ CHECK: vext.64 q5, q5, q8, #1         @ encoding: [0x60,0xa8,0xba,0xf2]
 
 
        vtrn.8  d17, d16
@@ -40,6 +59,8 @@
        vzip.8  q9, q8
        vzip.16 q9, q8
        vzip.32 q9, q8
+        vzip.32 d2, d3
+        vuzp.32 d2, d3
 
 @ CHECK: vuzp.8        d17, d16                @ encoding: [0x20,0x11,0xf2,0xf3]
 @ CHECK: vuzp.16 d17, d16               @ encoding: [0x20,0x11,0xf6,0xf3]
@@ -51,6 +72,8 @@
 @ CHECK: vzip.8        q9, q8                  @ encoding: [0xe0,0x21,0xf2,0xf3]
 @ CHECK: vzip.16 q9, q8                 @ encoding: [0xe0,0x21,0xf6,0xf3]
 @ CHECK: vzip.32 q9, q8                 @ encoding: [0xe0,0x21,0xfa,0xf3]
+@ CHECK: vtrn.32 d2, d3                 @ encoding: [0x83,0x20,0xba,0xf3]
+@ CHECK: vtrn.32 d2, d3                 @ encoding: [0x83,0x20,0xba,0xf3]
 
 
 @ VTRN alternate size suffices