ARM: Prevent ARMAsmParser::shouldOmitCCOutOperand() from misidentifying certain Thumb...

[oota-llvm.git] / test / MC / ARM / neont2-bitwise-encoding.s

diff --git a/test/MC/ARM/neont2-bitwise-encoding.s b/test/MC/ARM/neont2-bitwise-encoding.s
index 3acd7a8c99114ac2ff9e0860a8ba07209597057d..175873b69718cc4e1bcc114af697b850af340e66 100644 (file)
--- a/test/MC/ARM/neont2-bitwise-encoding.s
+++ b/test/MC/ARM/neont2-bitwise-encoding.s
@@ -1,49 +1,55 @@
 @ RUN: llvm-mc -mcpu=cortex-a8 -triple thumb-unknown-unknown -show-encoding < %s | FileCheck %s
-@ XFAIL: *
 
 .code 16
 
-@ CHECK: vand  d16, d17, d16           @ encoding: [0xb0,0x01,0x41,0xef]
        vand    d16, d17, d16
-@ CHECK: vand  q8, q8, q9              @ encoding: [0xf2,0x01,0x40,0xef]
        vand    q8, q8, q9
 
-@ CHECK: veor  d16, d17, d16           @ encoding: [0xb0,0x01,0x41,0xff]
+@ CHECK: vand  d16, d17, d16           @ encoding: [0x41,0xef,0xb0,0x01]
+@ CHECK: vand  q8, q8, q9              @ encoding: [0x40,0xef,0xf2,0x01]
+
        veor    d16, d17, d16
-@ CHECK: veor  q8, q8, q9              @ encoding: [0xf2,0x01,0x40,0xff]
        veor    q8, q8, q9
 
-@ CHECK: vorr  d16, d17, d16           @ encoding: [0xb0,0x01,0x61,0xef]
+@ CHECK: veor  d16, d17, d16           @ encoding: [0x41,0xff,0xb0,0x01]
+@ CHECK: veor  q8, q8, q9              @ encoding: [0x40,0xff,0xf2,0x01]
+
+
        vorr    d16, d17, d16
-@ CHECK: vorr  q8, q8, q9              @ encoding: [0xf2,0x01,0x60,0xef]
        vorr    q8, q8, q9
-@ CHECK: vorr.i32      d16, #0x1000000 @ encoding: [0x11,0x07,0xc0,0xef]
-  vorr.i32     d16, #0x1000000
-@ CHECK: vorr.i32      q8, #0x1000000  @ encoding: [0x51,0x07,0xc0,0xef]
-  vorr.i32     q8, #0x1000000
-@ CHECK: vorr.i32      q8, #0x0        @ encoding: [0x50,0x01,0xc0,0xef]
-  vorr.i32     q8, #0x0
-
-@ CHECK: vbic  d16, d17, d16           @ encoding: [0xb0,0x01,0x51,0xef]
+@      vorr.i32        d16, #0x1000000
+@      vorr.i32        q8, #0x1000000
+@      vorr.i32        q8, #0x0
+
+@ CHECK: vorr  d16, d17, d16           @ encoding: [0x61,0xef,0xb0,0x01]
+@ CHECK: vorr  q8, q8, q9              @ encoding: [0x60,0xef,0xf2,0x01]
+
+
        vbic    d16, d17, d16
-@ CHECK: vbic  q8, q8, q9              @ encoding: [0xf2,0x01,0x50,0xef]
        vbic    q8, q8, q9
-@ CHECK: vbic.i32      d16, #0xFF000000 @ encoding: [0x3f,0x07,0xc7,0xff]
-  vbic.i32     d16, #0xFF000000
-@ CHECK: vbic.i32      q8, #0xFF000000 @ encoding: [0x7f,0x07,0xc7,0xff]
-  vbic.i32     q8, #0xFF000000
+@      vbic.i32        d16, #0xFF000000
+@      vbic.i32        q8, #0xFF000000
+
+@ CHECK: vbic  d16, d17, d16           @ encoding: [0x51,0xef,0xb0,0x01]
+@ CHECK: vbic  q8, q8, q9              @ encoding: [0x50,0xef,0xf2,0x01]
+
 
-@ CHECK: vorn  d16, d17, d16           @ encoding: [0xb0,0x01,0x71,0xef]
        vorn    d16, d17, d16
-@ CHECK: vorn  q8, q8, q9              @ encoding: [0xf2,0x01,0x70,0xef]
        vorn    q8, q8, q9
 
-@ CHECK: vmvn  d16, d16                @ encoding: [0xa0,0x05,0xf0,0xff]
+@ CHECK: vorn  d16, d17, d16           @ encoding: [0x71,0xef,0xb0,0x01]
+@ CHECK: vorn  q8, q8, q9              @ encoding: [0x70,0xef,0xf2,0x01]
+
+
        vmvn    d16, d16
-@ CHECK: vmvn  q8, q8                  @ encoding: [0xe0,0x05,0xf0,0xff]
        vmvn    q8, q8
 
-@ CHECK: vbsl  d18, d17, d16           @ encoding: [0xb0,0x21,0x51,0xff]
+@ CHECK: vmvn  d16, d16                @ encoding: [0xf0,0xff,0xa0,0x05]
+@ CHECK: vmvn  q8, q8                  @ encoding: [0xf0,0xff,0xe0,0x05]
+
+
        vbsl    d18, d17, d16
-@ CHECK: vbsl  q8, q10, q9             @ encoding: [0xf2,0x01,0x54,0xff]
        vbsl    q8, q10, q9
+
+@ CHECK: vbsl  d18, d17, d16           @ encoding: [0x51,0xff,0xb0,0x21]
+@ CHECK: vbsl  q8, q10, q9             @ encoding: [0x54,0xff,0xf2,0x01]