ARM: Prevent ARMAsmParser::shouldOmitCCOutOperand() from misidentifying certain Thumb...
[oota-llvm.git] / test / MC / ARM / neont2-mul-encoding.s
index 4e33beb245d7a586aee7a1bcf90bdaccaa49dde7..dfbb66712fa56affc79fc4d27978d557e66ab3a9 100644 (file)
@@ -1,58 +1,78 @@
-@ RUN: llvm-mc -mcpu=cortex-a8 -triple thumb-unknown-unkown -show-encoding < %s | FileCheck %s
+@ RUN: llvm-mc -mcpu=cortex-a8 -triple thumb-unknown-unknown -show-encoding < %s | FileCheck %s
 
 .code 16
 
-@ CHECK: vmul.i8       d16, d16, d17           @ encoding: [0xb1,0x09,0x40,0xef]
        vmul.i8 d16, d16, d17
-@ CHECK: vmul.i16      d16, d16, d17   @ encoding: [0xb1,0x09,0x50,0xef]
        vmul.i16        d16, d16, d17
-@ CHECK: vmul.i32      d16, d16, d17   @ encoding: [0xb1,0x09,0x60,0xef]
        vmul.i32        d16, d16, d17
-@ CHECK: vmul.f32      d16, d16, d17   @ encoding: [0xb1,0x0d,0x40,0xff]
        vmul.f32        d16, d16, d17
-@ CHECK: vmul.i8       q8, q8, q9              @ encoding: [0xf2,0x09,0x40,0xef]
        vmul.i8 q8, q8, q9
-@ CHECK: vmul.i16      q8, q8, q9      @ encoding: [0xf2,0x09,0x50,0xef]
        vmul.i16        q8, q8, q9
-@ CHECK: vmul.i32      q8, q8, q9      @ encoding: [0xf2,0x09,0x60,0xef]
        vmul.i32        q8, q8, q9
-@ CHECK: vmul.f32      q8, q8, q9      @ encoding: [0xf2,0x0d,0x40,0xff]
        vmul.f32        q8, q8, q9
-@ CHECK: vmul.p8       d16, d16, d17           @ encoding: [0xb1,0x09,0x40,0xff]
        vmul.p8 d16, d16, d17
-@ CHECK: vmul.p8       q8, q8, q9              @ encoding: [0xf2,0x09,0x40,0xff]
        vmul.p8 q8, q8, q9
-@ CHECK: vqdmulh.s16   d16, d16, d17   @ encoding: [0xa1,0x0b,0x50,0xef]
+       vmul.i16        d18, d8, d0[3]
+
+@ CHECK: vmul.i8       d16, d16, d17   @ encoding: [0x40,0xef,0xb1,0x09]
+@ CHECK: vmul.i16      d16, d16, d17   @ encoding: [0x50,0xef,0xb1,0x09]
+@ CHECK: vmul.i32      d16, d16, d17   @ encoding: [0x60,0xef,0xb1,0x09]
+@ CHECK: vmul.f32      d16, d16, d17   @ encoding: [0x40,0xff,0xb1,0x0d]
+@ CHECK: vmul.i8       q8, q8, q9      @ encoding: [0x40,0xef,0xf2,0x09]
+@ CHECK: vmul.i16      q8, q8, q9      @ encoding: [0x50,0xef,0xf2,0x09]
+@ CHECK: vmul.i32      q8, q8, q9      @ encoding: [0x60,0xef,0xf2,0x09]
+@ CHECK: vmul.f32      q8, q8, q9      @ encoding: [0x40,0xff,0xf2,0x0d]
+@ CHECK: vmul.p8       d16, d16, d17   @ encoding: [0x40,0xff,0xb1,0x09]
+@ CHECK: vmul.p8       q8, q8, q9      @ encoding: [0x40,0xff,0xf2,0x09]
+@ CHECK: vmul.i16      d18, d8, d0[3]  @ encoding: [0xd8,0xef,0x68,0x28]
+
+
        vqdmulh.s16     d16, d16, d17
-@ CHECK: vqdmulh.s32   d16, d16, d17   @ encoding: [0xa1,0x0b,0x60,0xef]
        vqdmulh.s32     d16, d16, d17
-@ CHECK: vqdmulh.s16   q8, q8, q9      @ encoding: [0xe2,0x0b,0x50,0xef]
        vqdmulh.s16     q8, q8, q9
-@ CHECK: vqdmulh.s32   q8, q8, q9      @ encoding: [0xe2,0x0b,0x60,0xef]
        vqdmulh.s32     q8, q8, q9
-@ CHECK: vqrdmulh.s16  d16, d16, d17   @ encoding: [0xa1,0x0b,0x50,0xff]
+       vqdmulh.s16     d11, d2, d3[0]
+
+@ CHECK: vqdmulh.s16   d16, d16, d17   @ encoding: [0x50,0xef,0xa1,0x0b]
+@ CHECK: vqdmulh.s32   d16, d16, d17   @ encoding: [0x60,0xef,0xa1,0x0b]
+@ CHECK: vqdmulh.s16   q8, q8, q9      @ encoding: [0x50,0xef,0xe2,0x0b]
+@ CHECK: vqdmulh.s32   q8, q8, q9      @ encoding: [0x60,0xef,0xe2,0x0b]
+@ CHECK: vqdmulh.s16   d11, d2, d3[0]  @ encoding: [0x92,0xef,0x43,0xbc]
+
+
        vqrdmulh.s16    d16, d16, d17
-@ CHECK: vqrdmulh.s32  d16, d16, d17   @ encoding: [0xa1,0x0b,0x60,0xff]
        vqrdmulh.s32    d16, d16, d17
-@ CHECK: vqrdmulh.s16  q8, q8, q9      @ encoding: [0xe2,0x0b,0x50,0xff]
        vqrdmulh.s16    q8, q8, q9
-@ CHECK: vqrdmulh.s32  q8, q8, q9      @ encoding: [0xe2,0x0b,0x60,0xff]
        vqrdmulh.s32    q8, q8, q9
-@ CHECK: vmull.s8      q8, d16, d17    @ encoding: [0xa1,0x0c,0xc0,0xef]
+
+@ CHECK: vqrdmulh.s16  d16, d16, d17   @ encoding: [0x50,0xff,0xa1,0x0b]
+@ CHECK: vqrdmulh.s32  d16, d16, d17   @ encoding: [0x60,0xff,0xa1,0x0b]
+@ CHECK: vqrdmulh.s16  q8, q8, q9      @ encoding: [0x50,0xff,0xe2,0x0b]
+@ CHECK: vqrdmulh.s32  q8, q8, q9      @ encoding: [0x60,0xff,0xe2,0x0b]
+
+
        vmull.s8        q8, d16, d17
-@ CHECK: vmull.s16     q8, d16, d17    @ encoding: [0xa1,0x0c,0xd0,0xef]
        vmull.s16       q8, d16, d17
-@ CHECK: vmull.s32     q8, d16, d17    @ encoding: [0xa1,0x0c,0xe0,0xef]
        vmull.s32       q8, d16, d17
-@ CHECK: vmull.u8      q8, d16, d17    @ encoding: [0xa1,0x0c,0xc0,0xff]
        vmull.u8        q8, d16, d17
-@ CHECK: vmull.u16     q8, d16, d17    @ encoding: [0xa1,0x0c,0xd0,0xff]
        vmull.u16       q8, d16, d17
-@ CHECK: vmull.u32     q8, d16, d17    @ encoding: [0xa1,0x0c,0xe0,0xff]
        vmull.u32       q8, d16, d17
-@ CHECK: vmull.p8      q8, d16, d17    @ encoding: [0xa1,0x0e,0xc0,0xef]
        vmull.p8        q8, d16, d17
-@ CHECK: vqdmull.s16   q8, d16, d17    @ encoding: [0xa1,0x0d,0xd0,0xef]
+
+@ CHECK: vmull.s8      q8, d16, d17    @ encoding: [0xc0,0xef,0xa1,0x0c]
+@ CHECK: vmull.s16     q8, d16, d17    @ encoding: [0xd0,0xef,0xa1,0x0c]
+@ CHECK: vmull.s32     q8, d16, d17    @ encoding: [0xe0,0xef,0xa1,0x0c]
+@ CHECK: vmull.u8      q8, d16, d17    @ encoding: [0xc0,0xff,0xa1,0x0c]
+@ CHECK: vmull.u16     q8, d16, d17    @ encoding: [0xd0,0xff,0xa1,0x0c]
+@ CHECK: vmull.u32     q8, d16, d17    @ encoding: [0xe0,0xff,0xa1,0x0c]
+@ CHECK: vmull.p8      q8, d16, d17    @ encoding: [0xc0,0xef,0xa1,0x0e]
+
+
        vqdmull.s16     q8, d16, d17
-@ CHECK: vqdmull.s32   q8, d16, d17    @ encoding: [0xa1,0x0d,0xe0,0xef]
        vqdmull.s32     q8, d16, d17
+        vqdmull.s16    q1, d7, d1[1]
+
+@ CHECK: vqdmull.s16   q8, d16, d17    @ encoding: [0xd0,0xef,0xa1,0x0d]
+@ CHECK: vqdmull.s32   q8, d16, d17    @ encoding: [0xe0,0xef,0xa1,0x0d]
+@ CHECK: vqdmull.s16   q1, d7, d1[1]   @ encoding: [0x97,0xef,0x49,0x2b]
+