ARM: Prevent ARMAsmParser::shouldOmitCCOutOperand() from misidentifying certain Thumb...

[oota-llvm.git] / test / MC / ARM / neont2-reverse-encoding.s

diff --git a/test/MC/ARM/neont2-reverse-encoding.s b/test/MC/ARM/neont2-reverse-encoding.s
index 4155492999789300abf8c0c91072a7ec2142d082..f37d72da11af64a3b0b8ba3c7f9a5a3da8fb2d38 100644 (file)
--- a/test/MC/ARM/neont2-reverse-encoding.s
+++ b/test/MC/ARM/neont2-reverse-encoding.s
@@ -1,26 +1,26 @@
-@ RUN: llvm-mc -mcpu=cortex-a8 -triple thumb-unknown-unkown -show-encoding < %s | FileCheck %s
+@ RUN: llvm-mc -mcpu=cortex-a8 -triple thumb-unknown-unknown -show-encoding < %s | FileCheck %s
 
-@ CHECK: vrev64.8      d16, d16        @ encoding: [0x20,0x00,0xf0,0xff]
+@ CHECK: vrev64.8      d16, d16        @ encoding: [0xf0,0xff,0x20,0x00]
        vrev64.8        d16, d16
-@ CHECK: vrev64.16     d16, d16        @ encoding: [0x20,0x00,0xf4,0xff]
+@ CHECK: vrev64.16     d16, d16        @ encoding: [0xf4,0xff,0x20,0x00]
        vrev64.16       d16, d16
-@ CHECK: vrev64.32     d16, d16        @ encoding: [0x20,0x00,0xf8,0xff]
+@ CHECK: vrev64.32     d16, d16        @ encoding: [0xf8,0xff,0x20,0x00]
        vrev64.32       d16, d16
-@ CHECK: vrev64.8      q8, q8          @ encoding: [0x60,0x00,0xf0,0xff]
+@ CHECK: vrev64.8      q8, q8          @ encoding: [0xf0,0xff,0x60,0x00]
        vrev64.8        q8, q8
-@ CHECK: vrev64.16     q8, q8          @ encoding: [0x60,0x00,0xf4,0xff]
+@ CHECK: vrev64.16     q8, q8          @ encoding: [0xf4,0xff,0x60,0x00]
        vrev64.16       q8, q8
-@ CHECK: vrev64.32     q8, q8          @ encoding: [0x60,0x00,0xf8,0xff]
+@ CHECK: vrev64.32     q8, q8          @ encoding: [0xf8,0xff,0x60,0x00]
        vrev64.32       q8, q8
-@ CHECK: vrev32.8      d16, d16        @ encoding: [0xa0,0x00,0xf0,0xff]
+@ CHECK: vrev32.8      d16, d16        @ encoding: [0xf0,0xff,0xa0,0x00]
        vrev32.8        d16, d16
-@ CHECK: vrev32.16     d16, d16        @ encoding: [0xa0,0x00,0xf4,0xff]
+@ CHECK: vrev32.16     d16, d16        @ encoding: [0xf4,0xff,0xa0,0x00]
        vrev32.16       d16, d16
-@ CHECK: vrev32.8      q8, q8          @ encoding: [0xe0,0x00,0xf0,0xff]
+@ CHECK: vrev32.8      q8, q8          @ encoding: [0xf0,0xff,0xe0,0x00]
        vrev32.8        q8, q8
-@ CHECK: vrev32.16     q8, q8          @ encoding: [0xe0,0x00,0xf4,0xff]
+@ CHECK: vrev32.16     q8, q8          @ encoding: [0xf4,0xff,0xe0,0x00]
        vrev32.16       q8, q8
-@ CHECK: vrev16.8      d16, d16        @ encoding: [0x20,0x01,0xf0,0xff]
+@ CHECK: vrev16.8      d16, d16        @ encoding: [0xf0,0xff,0x20,0x01]
        vrev16.8        d16, d16
-@ CHECK: vrev16.8      q8, q8          @ encoding: [0x60,0x01,0xf0,0xff]
+@ CHECK: vrev16.8      q8, q8          @ encoding: [0xf0,0xff,0x60,0x01]
        vrev16.8        q8, q8