Support for microMIPS FPU instructions 2.

[oota-llvm.git] / test / MC / ARM / thumb-neon-v8.s

diff --git a/test/MC/ARM/thumb-neon-v8.s b/test/MC/ARM/thumb-neon-v8.s
index df40238757cfa9356d3cdb7a6342614ab94fc65d..5b327810f85acd5613de26716a62fce737aef8eb 100644 (file)
--- a/test/MC/ARM/thumb-neon-v8.s
+++ b/test/MC/ARM/thumb-neon-v8.s
@@ -44,3 +44,40 @@ vcvtp.s32.f32        q4, q15
 @ CHECK: vcvtp.s32.f32 q4, q15 @ encoding: [0xbb,0xff,0x6e,0x82]
 vcvtp.u32.f32  q9, q8
 @ CHECK: vcvtp.u32.f32 q9, q8 @ encoding: [0xfb,0xff,0xe0,0x22]
+
+vrintn.f32 d3, d0
+@ CHECK: vrintn.f32 d3, d0 @ encoding: [0xba,0xff,0x00,0x34]
+vrintn.f32 q1, q4
+@ CHECK: vrintn.f32 q1, q4 @ encoding: [0xba,0xff,0x48,0x24]
+vrintx.f32 d5, d12
+@ CHECK: vrintx.f32 d5, d12 @ encoding: [0xba,0xff,0x8c,0x54]
+vrintx.f32 q0, q3
+@ CHECK: vrintx.f32 q0, q3 @ encoding: [0xba,0xff,0xc6,0x04]
+vrinta.f32 d3, d0
+@ CHECK: vrinta.f32 d3, d0 @ encoding: [0xba,0xff,0x00,0x35]
+vrinta.f32 q8, q2
+@ CHECK: vrinta.f32 q8, q2 @ encoding: [0xfa,0xff,0x44,0x05]
+vrintz.f32 d12, d18
+@ CHECK: vrintz.f32 d12, d18 @ encoding: [0xba,0xff,0xa2,0xc5]
+vrintz.f32 q9, q4
+@ CHECK: vrintz.f32 q9, q4 @ encoding: [0xfa,0xff,0xc8,0x25]
+vrintm.f32 d3, d0
+@ CHECK: vrintm.f32 d3, d0 @ encoding: [0xba,0xff,0x80,0x36]
+vrintm.f32 q1, q4
+@ CHECK: vrintm.f32 q1, q4 @ encoding: [0xba,0xff,0xc8,0x26]
+vrintp.f32 d3, d0
+@ CHECK: vrintp.f32 d3, d0 @ encoding: [0xba,0xff,0x80,0x37]
+vrintp.f32 q1, q4
+@ CHECK: vrintp.f32 q1, q4 @ encoding: [0xba,0xff,0xc8,0x27]
+
+@ test the aliases of vrint
+vrintn.f32.f32 d3, d0
+@ CHECK: vrintn.f32 d3, d0 @ encoding: [0xba,0xff,0x00,0x34]
+vrintx.f32.f32 q0, q3
+@ CHECK: vrintx.f32 q0, q3 @ encoding: [0xba,0xff,0xc6,0x04]
+vrinta.f32.f32 d3, d0
+@ CHECK: vrinta.f32 d3, d0 @ encoding: [0xba,0xff,0x00,0x35]
+vrintz.f32.f32 q9, q4
+@ CHECK: vrintz.f32 q9, q4 @ encoding: [0xfa,0xff,0xc8,0x25]
+vrintp.f32.f32 q1, q4
+@ CHECK: vrintp.f32 q1, q4 @ encoding: [0xba,0xff,0xc8,0x27]