X86-64: Mark WINCALL and more tail call instructions as code gen only.

[oota-llvm.git] / test / MC / AsmParser / X86 / x86_instructions.s

diff --git a/test/MC/AsmParser/X86/x86_instructions.s b/test/MC/AsmParser/X86/x86_instructions.s
index 4c5b698d3fc60a09660c7a9a96b40020200f1c40..92fb1b243114058a8dc6a41de0022b4cd4c10170 100644 (file)
--- a/test/MC/AsmParser/X86/x86_instructions.s
+++ b/test/MC/AsmParser/X86/x86_instructions.s
@@ -1,5 +1,3 @@
-// FIXME: Switch back to FileCheck once we print actual instructions
-        
 // RUN: llvm-mc -triple x86_64-unknown-unknown %s | FileCheck %s
 
 // CHECK: subb %al, %al
@@ -17,6 +15,14 @@
 // CHECK: movl %eax, 10(,%ebx,4)
         movl %eax, 10(, %ebx, 4)
 
+// CHECK: movl 0, %eax        
+        movl 0, %eax
+// CHECK: movl $0, %eax        
+        movl $0, %eax
+        
+// CHECK: ret
+        ret
+        
 // FIXME: Check that this matches SUB32ri8
 // CHECK: subl $1, %eax
         subl $1, %eax
@@ -50,9 +56,98 @@
         subl %eax, %ebx
         
 // FIXME: Check that this matches the correct instruction.
-// CHECK: call *%rax
+// CHECK: callq *%rax
         call *%rax
 
 // FIXME: Check that this matches the correct instruction.
 // CHECK: shldl %cl, %eax, %ebx
         shldl %cl, %eax, %ebx
+
+// CHECK: shll $2, %eax
+        shll $2, %eax
+
+// CHECK: shll $2, %eax
+        sall $2, %eax
+
+// CHECK: rep
+// CHECK: insb
+        rep;insb
+
+// CHECK: rep
+// CHECK: outsb
+        rep;outsb
+
+// CHECK: rep
+// CHECK: movsb
+        rep;movsb
+
+// CHECK: rep
+// CHECK: lodsb
+        rep;lodsb
+
+// CHECK: rep
+// CHECK: stosb
+        rep;stosb
+
+// NOTE: repz and repe have the same opcode as rep
+// CHECK: rep
+// CHECK: cmpsb
+        repz;cmpsb
+
+// NOTE: repnz has the same opcode as repne
+// CHECK: repne
+// CHECK: cmpsb
+        repnz;cmpsb
+
+// NOTE: repe and repz have the same opcode as rep
+// CHECK: rep
+// CHECK: scasb
+        repe;scasb
+
+// CHECK: repne
+// CHECK: scasb
+        repne;scasb
+
+// CHECK: lock
+// CHECK: cmpxchgb %al, (%ebx)
+        lock;cmpxchgb %al, 0(%ebx)
+
+// CHECK: cs
+// CHECK: movb (%eax), %al
+        cs;movb 0(%eax), %al
+
+// CHECK: ss
+// CHECK: movb (%eax), %al
+        ss;movb 0(%eax), %al
+
+// CHECK: ds
+// CHECK: movb (%eax), %al
+        ds;movb 0(%eax), %al
+
+// CHECK: es
+// CHECK: movb (%eax), %al
+        es;movb 0(%eax), %al
+
+// CHECK: fs
+// CHECK: movb (%eax), %al
+        fs;movb 0(%eax), %al
+
+// CHECK: gs
+// CHECK: movb (%eax), %al
+        gs;movb 0(%eax), %al
+
+// CHECK: fadd %st(0)
+// CHECK: fadd %st(1)
+// CHECK: fadd %st(7)
+
+fadd %st(0)
+fadd %st(1)
+fadd %st(7)
+
+// CHECK: leal 0, %eax
+        leal 0, %eax
+
+// rdar://7986634 - Insensitivity on opcodes.
+// CHECK: int3
+INT3
+