Fix LDRi12 immediate operand, which was changed to be the second operand in $addrmode...

[oota-llvm.git] / test / MC / Disassembler / ARM / arm-tests.txt

diff --git a/test/MC/Disassembler/ARM/arm-tests.txt b/test/MC/Disassembler/ARM/arm-tests.txt
index 0f6aeb7052b91a380111ff87c103cbae4f93eeb7..7947c6a3d59315231ed66e1dc9350e4c9968cd0d 100644 (file)
--- a/test/MC/Disassembler/ARM/arm-tests.txt
+++ b/test/MC/Disassembler/ARM/arm-tests.txt
@@ -1,7 +1,16 @@
 # RUN: llvm-mc --disassemble %s -triple=arm-apple-darwin9 | FileCheck %s
 
+# CHECK:       addpl   r4, pc, #19, 8
+0x4c 0x45 0x8f 0x52
+
 # CHECK:       b       #0
-0xfe 0xff 0xff 0xea
+0x00 0x00 0x00 0xea
+
+# CHECK:       bl      #7732
+0x8d 0x07 0x00 0xeb
+
+# CHECK:       bleq    #-4
+0xff 0xff 0xff 0x0b
 
 # CHECK:       bfc     r8, #0, #16
 0x1f 0x80 0xcf 0xe7
@@ -130,3 +139,87 @@
 
 # CHECK: msr cpsr_fc, r0
 0x00 0xf0 0x29 0xe1
+
+# CHECK:       msrmi   cpsr_c, #241, 8
+0xf1 0xf4 0x21 0x43
+
+# CHECK: rsbs r6, r7, r8
+0x08 0x60 0x77 0xe0
+
+# CHECK: blxeq r5
+0x35 0xff 0x2f 0x01
+
+# CHECK: bx r12
+0x1c 0xff 0x2f 0xe1
+
+# CHECK:       uqadd16mi       r6, r11, r8
+0x18 0x60 0x6b 0x46
+
+# CHECK:       str     r0, [sp, #4]
+0x04 0x00 0x8d 0xe5
+
+# CHECK:       str     r1, [sp]
+0x00 0x10 0x8d 0xe5
+
+# CHECK:       ldr     r3, [pc, #144]
+0x90 0x30 0x9f 0xe5
+
+# CHECK:       ldr     r3, [r0, #-4]
+0x4 0x30 0x10 0xe5
+
+# CHECK:       ldr     r5, [sp, r0, lsl #1]!
+0x80 0x50 0xbd 0xe7
+
+# CHECK:       ldr     r5, [r7], -r0, lsr #2
+0x20 0x51 0x17 0xe6
+
+# CHECK:       strdeq  r2, r3, [r0], -r8
+0xf8 0x24 0x00 0x00
+
+# CHECK:       ldrdeq  r2, [r0], -r12
+0xdc 0x24 0x00 0x00
+
+# CHECK:       ldrbt   r3, [r4], -r5, lsl #12
+0x05 0x36 0x74 0xe6
+
+# CHECK:       vcmpe.f64       d8, #0
+0xc0 0x8b 0xb5 0xee
+
+# CHECK:       vldmdb  r2!, {s7, s8, s9, s10, s11}
+0x05 0x3a 0x72 0xed
+
+# CHECK:       vldr.32 s23, [r2, #660]
+0xa5 0xba 0xd2 0xed
+
+# CHECK:       strtvc  r5, [r3], r0, lsr #20
+0x30 0x5a 0xa3 0x76
+
+# CHECK:       stmiblo sp, {r0, r4, r8, r11, r12, pc}
+0x11 0x99 0x8d 0x39
+
+# CHECK:       ldmdb   sp, {r0, r4, r8, r11, r12, pc}
+0x11 0x99 0x1d 0xe9
+
+# CHECK:       swpge   r3, r2, [r6]
+0x92 0x30 0x06 0xa1
+
+# CHECK:       umull   r1, r2, r3, r4
+0x93 0x14 0x82 0xe0
+
+# CHECK:       pld     [pc, #-0]
+0x00 0xf0 0x1f 0xf5
+
+# CHECK:       pli     [pc, #-0]
+0x00 0xf0 0x5f 0xf4
+
+# CHECK:       pli     [r3, r1, lsl #2]
+0x01 0xf1 0xd3 0xf6
+
+# CHECK:       stc     p2, cr4, [r9], {157}
+0x9d 0x42 0x89 0xec
+
+# CHECK:       stc2    p2, cr4, [r9], {157}
+0x9d 0x42 0x89 0xfc
+
+# CHECK:       blx     #60
+0x0f 0x00 0x00 0xfa