Revert "[LSR] Generate and use zero extends"

[oota-llvm.git] / test / MC / Disassembler / Hexagon / alu32_alu.txt

diff --git a/test/MC/Disassembler/Hexagon/alu32_alu.txt b/test/MC/Disassembler/Hexagon/alu32_alu.txt
index 42dc373ac054812ef518aac39806e12bd55f1647..26b320ecde00f187183b55558fb0d03c4f771772 100644 (file)
--- a/test/MC/Disassembler/Hexagon/alu32_alu.txt
+++ b/test/MC/Disassembler/Hexagon/alu32_alu.txt
@@ -1,4 +1,4 @@
-# RUN: llvm-mc --triple hexagon -disassemble < %s | FileCheck %s
+# RUN: llvm-mc -triple hexagon -disassemble < %s | FileCheck %s
 # Hexagon Programmer's Reference Manual 11.1.1 ALU32/ALU
 
 # Add
@@ -49,7 +49,7 @@
 0xf1 0xff 0x5f 0x78
 # CHECK: r17 = #32767
 0xf1 0xff 0xdf 0x78
-# CHECK: r17 = ##65535
+# CHECK: r17 = #-1
 
 # Transfer register
 0x11 0xc0 0x75 0x70